Senior Analog Design Engineer - High-Speed Serdes

Kandou Ai; Saint-Sulpice; Vor Ort; CHF 110.000 - 170.000; Vollzeit

Zusammenfassung

Kandou is redefining AI hardware economics with a chiplet-based, energy-efficient memory fabric. We seek an Analog Design Engineer to lead design, modeling, and verification of high-speed Serdes in advanced nodes, collaborating across architecture, layout, and verification teams.

Requirements include a Master’s/PhD in Electronics and 5+ years in analog design, with Cadence Virtuoso and Ocean/MDL experience. Join us in a frontier role at the intersection of AI and semiconductor innovation.

Qualifikationen

• Master's or PhD in Electronics or related field.
• 5+ years in analog design and layout of high-speed circuits.
• Experience with multi-gigabit data-link transceivers or RF.
• Proficiency with Cadence Virtuoso and silicon validation.

Aufgaben

• Design, model, and verify custom analog designs for high-speed Serdes.
• Verify analog circuits to meet architecture specs and flows.
• Support customers on requirements, performance results, and delivery.
• Assist analog IP integration and cross-functional collaboration.

Kenntnisse

Analog design

Serdes circuits

DFT/DFM/ESD

Layout techniques

EDA tools

Oscillators/PLL

Team collaboration

Ausbildung

Master's/PhD in Electronics

Tools

Cadence Virtuoso

Ocean/MDL

Jobbeschreibung

Kandou is redefining AI hardware economics with a chiplet-based, energy-efficient memory fabric. We seek an Analog Design Engineer to lead design, modeling, and verification of high-speed Serdes in advanced nodes, collaborating across architecture, layout, and verification teams.

Requirements include a Master’s/PhD in Electronics and 5+ years in analog design, with Cadence Virtuoso and Ocean/MDL experience. Join us in a frontier role at the intersection of AI and semiconductor innovation.