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Huawei Technologies Switzerland AG in Zurich invites researchers to design next‑generation rack and SuperPod architectures, combining elastic resource pooling with high‑bandwidth, low‑latency fabrics. The work spans cross‑layer co‑design across apps, parallel programming models, interconnects, and compute/memory systems.
You will prototype features such as Tiered Memory, prefetching, near‑memory processing, and workload‑centric co‑design for General Compute and Generative AI.
Huawei Technologies Switzerland AG in Zurich invites researchers to design next‑generation rack and SuperPod architectures, combining elastic resource pooling with high‑bandwidth, low‑latency fabrics. The work spans cross‑layer co‑design across apps, parallel programming models, interconnects, and compute/memory systems.
You will prototype features such as Tiered Memory, prefetching, near‑memory processing, and workload‑centric co‑design for General Compute and Generative AI.