Research Intern on Hardware Acceleration for Agentic-Era Server Workloads

Huawei

Dübendorf

On-site

CHF 90,000 - 130,000

Full time

14 days+
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Job summary

Huawei Technologies Switzerland AG is seeking a highly skilled candidate to advance server architecture research, analyzing modern workloads, reading top-tier papers, and prototyping acceleration strategies across software and hardware interfaces.

Join a collaborative team exploring AI accelerators, compiler backends, and hardware‑software co‑design, with opportunities to publish patents and contribute to cutting‑edge computing systems.

Qualifications

  • Enrolled in Masters/PhD program or completed Masters in Computer Science/Engineering.
  • Knowledge about server workloads in the modern agentic era.
  • Proficient in using agentic workflows with AI tools.
  • Proficient in C/C++, LLVM/MLIR.
  • Knowledge about server CPU and SoC architecture. Experience with computer architecture simulators (gem5-accel, Aladdin, Zsim, Ramulator2, Booksim2, Cacti).
  • Knowledge about intermediate representations, compiler, code generation and backends (lli, mlir-opt).
  • Research acumen in analysing bottlenecks, brainstorming solutions, and evaluating ideas with simulators.
  • Experience in reading, analyzing, critiquing, and implementing research papers.
  • Experience with trace collection and profiling tools.

Responsibilities

  • Understand modern server workloads in the agentic era: Data Analytics, Vector Databases, Graph Neural Networks, Knowledge Graphs, Tokenizer, Embedding Lookups, etc.
  • Read and analyze research papers from architecture and systems conferences (ISCA, MICRO, HPCA, ASPLOS, VLDB, etc.).
  • Collect traces by running complex server benchmark suites, profile and analyze bottlenecks, propose hardware acceleration opportunities and solutions. Write micro‑benchmarks to test hypothesis.
  • Model hardware‑software interface for accelerator integration mechanisms.
  • Investigate cross domain hardware integration and usage scenarios and solutions (software --> compiler --> ISA).
  • Perform experiments via emulation and simulation setups, gather insights, write/publish patent and research papers.

Skills

C/C++
LLVM/MLIR
Server CPU/SoC architecture
Research & analysis
Trace collection & profiling

Education

Masters or PhD in Computer Science/Engineering

Tools

gem5-accel
Aladdin
Zsim
Ramulator2
Booksim2
Cacti
lli
mlir-opt
LLVM/MLIR

Job description

About Us: At Huawei Technologies Switzerland AG, we are a leading technology firm dedicated to developing cutting‑edge solutions that redefine industry standards and push technological boundaries. Our core focus is on creating advanced computing architectures that can efficiently support and enhance the performance of artificial intelligence systems. We believe in innovation as a driving force for improvement and are committed to achieving excellence in all areas of research and development.

Job Responsibilities:
  • Understand modern server workloads in the agentic era: Data Analytics, Vector Databases, Graph Neural Networks, Knowledge Graphs, Tokenizer, Embedding Lookups, etc.
  • Read and analyze research papers from architecture and systems conferences (ISCA, MICRO, HPCA, ASPLOS, VLDB, etc.).
  • Collect traces by running complex server benchmark suites, profile and analyze bottlenecks, propose hardware acceleration opportunities and solutions. Write micro‑benchmarks to test hypothesis.
  • Model hardware‑software interface for accelerator integration mechanisms.
  • Investigate cross domain hardware integration and usage scenarios and solutions (software --> compiler --> ISA).
  • Perform experiments via emulation and simulation setups, gather insights, write/publish patent and research papers.
Required skills:
  • Enrolled in Masters/PhD program or completed Masters in Computer Science/Engineering.
  • Knowledge about server workloads in the modern agentic era.
  • Proficient in using agentic workflows with AI tools.
  • Proficient in C/C++, LLVM/MLIR.
  • Knowledge about server CPU and SoC architecture. Experience with computer architecture simulators (gem5-accel, Aladdin, Zsim, Ramulator2, Booksim2, Cacti).
  • Knowledge about intermediate representations, compiler, code generation and backends (lli, mlir-opt).
  • Research acumen in analysing bottlenecks, brainstorming solutions, and evaluating ideas with simulators.
  • Experience in reading, analyzing, critiquing, and implementing research papers.
  • Experience with trace collection and profiling tools.
What We Offer:
  • Competitive salary and benefits package;
  • Access to state‑of‑the‑art technology and tools;
  • Opportunities for professional growth and development;
  • Interact with a large pool of expert researchers in a wide variety of areas;
  • Last but certainly not least: be part of innovative projects that make a difference.
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