Lead AI Compiler Architect for Next-Gen Compute

Huawei; Zürich; On-site; CHF 120,000 - 160,000; Full time

Job summary

Huawei Technologies Switzerland AG in Zurich seeks a researcher to explore novel compiler technologies and toolchains for next-generation computing architectures, including CPUs and AI accelerators.

You will analyze software-hardware co-design trade-offs, collaborate with cross-functional experts, and contribute to open frameworks such as LLVM, MLIR, TVM, and XLA while advancing strategic research goals in Zurich.

Qualifications

• MSc or PhD in Computer Science, Software Engineering, or a related field.
• At least 1 year of relevant experience in compiler development or computer architecture.
• Strong background in compiler fundamentals and optimizations.
• Experience with LLVM, GCC, MLIR, TVM or XLA is highly preferred.

Responsibilities

• Design and validate efficient compiler infrastructures and algorithms.
• Drive software-hardware co-optimization for AI accelerators and GPUs.
• Track compiler ecosystem trends and contribute to research publications.

Skills

Compiler development

C/C++ proficiency

English fluency

Hardware-software co-design

Performance optimization

Education

MSc or PhD in Computer Science or related field

Tools

LLVM

GCC

MLIR

Apache TVM

XLA

Job description

Huawei Technologies Switzerland AG in Zurich seeks a researcher to explore novel compiler technologies and toolchains for next-generation computing architectures, including CPUs and AI accelerators.

You will analyze software-hardware co-design trade-offs, collaborate with cross-functional experts, and contribute to open frameworks such as LLVM, MLIR, TVM, and XLA while advancing strategic research goals in Zurich.