Research Intern: CPU Microarchitecture & Memory Hierarchy

Huawei; Zürich; Vor Ort; CHF 70.000 - 90.000; Vollzeit

Zusammenfassung

Huawei's Zurich Research Center in Switzerland invites motivated Master’s or PhD candidates to join a cutting-edge project on next-generation CPU microarchitecture. You will conduct research, model and benchmark new designs, and explore learning-based components using AI/ML approaches.

Work closely with researchers and product teams to ensure models reflect real-world constraints. A strong background in CPU architectures, memory hierarchies and architectural simulation platforms is expected.

Qualifikationen

• Currently enrolled in a Master’s or PhD program in Computer Science, Computer Engineering, or Electrical Engineering
• Good knowledge of CPU architecture and memory hierarchies
• Experience with architectural simulation platforms

Aufgaben

• Conduct research on next-generation CPU microarchitectures and memory hierarchies.
• Model and evaluate new microarchitectural designs using in-house and/or open-source simulation frameworks.
• Explore intelligent, learning-based components built on AI/ML approaches tailored to microarchitectural problems.
• Collaborate closely with researchers and product teams to align models with real world constraints.
• Publish and present at top-tier conferences, and share findings with internal experts.

Kenntnisse

CPU architecture

Memory hierarchies

Architectural simulation

AI/ML approaches

Ausbildung

Master’s or PhD program in CS/CE/EE

Tools

Architectural simulation platforms

Jobbeschreibung

Huawei's Zurich Research Center in Switzerland invites motivated Master’s or PhD candidates to join a cutting-edge project on next-generation CPU microarchitecture. You will conduct research, model and benchmark new designs, and explore learning-based components using AI/ML approaches.

Work closely with researchers and product teams to ensure models reflect real-world constraints. A strong background in CPU architectures, memory hierarchies and architectural simulation platforms is expected.