Hybrid Digital ASIC & System Modeling Engineer

CERN

Genf

Híbrido

CHF 71 000 - 78 000

Tempo integral

14 dias+

Uma candidatura completa num minuto

Currículo e carta de apresentação personalizados, prontos a enviar.

Ultrapassa os filtros ATS

Vantagens oferecidas por esta oferta de emprego

Health insurance
Pension plan
Relocation package
Language training
Annual leave 30 days

Resumo da oferta

CERN is seeking an engineer for its IC Technology R&D team to advance detectors electronics. You will work at the interface of architecture-level simulation and hardware implementation, shaping digital ASIC design and system-level modelling for future experiments.

You will develop and validate electronic systems, collaborate with physicists, engineers, and software developers, and contribute to verification, performance improvements, and documentation.

Qualificações

  • Master's degree in Electronics or related field with 2–6 years of post-graduation professional experience.
  • PhD with no more than 3 years of post-graduation professional experience.
  • Experience in electronics or detector electronics is beneficial.

Responsabilidades

  • Develop and use simulation models to study electronic systems.
  • Design and implement digital ICs from system-level specifications.
  • Verify and validate designs through simulation and testing.
  • Collaborate with engineers, physicists and software developers.
  • Improve performance, efficiency and reliability of electronic systems.
  • Document designs and share knowledge within the team.
  • This role includes team supervision responsibilities.

Conhecimentos

Digital design
VHDL/Verilog
C++
Python
Simulation tools
Analytical skills
Communication
English proficiency

Formação académica

Master's degree in Electronics or related field
PhD with up to 3 years post-grad experience

Ferramentas

EDA tools
Simulation environments
Git

Descrição da oferta de emprego

CERN is seeking an engineer for its IC Technology R&D team to advance detectors electronics. You will work at the interface of architecture-level simulation and hardware implementation, shaping digital ASIC design and system-level modelling for future experiments.

You will develop and validate electronic systems, collaborate with physicists, engineers, and software developers, and contribute to verification, performance improvements, and documentation.

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