Senior Analog IC Modelling Engineer

IC Resources; Lausanne; Vor Ort; CHF 120.000 - 180.000; Vollzeit

Zusammenfassung

IC Resources is seeking a Senior Analog IC Modelling Engineer for a semiconductor company in Lausanne, Switzerland. The role focuses on developing circuit models across abstraction levels and collaborating with analog designers and system modelling teams.

The ideal candidate has 7+ years of analogue IC modelling experience, strong scripting ability (Python/MATLAB), and hands-on use of Cadence tools, Ocean, and MDL to drive accurate simulations and validation.

Qualifikationen

• 7+ years of analog IC design and modelling experience.
• Experience modelling high frequency analog circuits.
• Experience with VerilogA, SystemVerilog, Python or MATLAB.
• Experience with Cadence analog design tools.
• Experience with Ocean and MDL.

Aufgaben

• Develop accurate and efficient models for high-frequency analog circuits.
• Create models to support sub-block specifications and system requirements.
• Verify post layout performance against modelled results.
• Develop modelling methodologies and improve simulation efficiency.
• Automate simulations and extract circuit performance.
• Correlate modelling results with transistor level simulations.
• Document and present modelling results throughout the design process.

Kenntnisse

Analog IC design

Modelling & simulation

VerilogA/SystemVerilog

Python/MATLAB

Tools

Cadence tools

Ocean

MDL

Jobbeschreibung

I am recruiting for a Senior Analog IC Modelling Engineer for my client, a semiconductor company developing advanced high-performance technologies in Lausanne, Switzerland. The Senior Analog IC Modelling Engineer will develop circuit models across different levels of abstraction and work closely with analog designers and system modelling teams.

Responsibilities

• Develop accurate and efficient models for high-frequency analog circuits
• Create models to support sub-block specifications and system requirements
• Verify post layout performance against modelled results
• Develop modelling methodologies and improve simulation efficiency
• Automate simulations and extract circuit performance
• Correlate modelling results with transistor level simulations
• Document and present modelling results throughout the design process

Requirements

• 7+ years of analog IC design and modelling experience
• Experience modelling high frequency analog circuits
• Experience with VerilogA, SystemVerilog, Python or MATLAB
• Experience with Cadence analog design tools
• Experience with Ocean and MDL

This Senior Analog IC Modelling Engineer role would suit an experienced analog IC engineer with strong modelling and simulation experience.