ASIC Design Verification Engineer

Celero Communications; Ottawa; On-site; CAD 150,000 - 250,000; Full time

Job summary

Celero Communications in Ottawa, Ontario, is looking for a skilled ASIC Verification Engineer to join their team. You will develop and implement verification plans for complex ASIC designs and ensure functionality and reliability of ASIC designs.

With a Bachelor's degree in Electrical Engineering or a related field and 3+ years of experience, you will work with SystemVerilog and UVM, creating test cases and maintaining testbenches. The salary ranges from $150,000 to $250,000 annually.

Qualifications

• 3+ years of experience in ASIC verification.
• Proficiency in Verilog, SystemVerilog, UVM.
• Strong understanding of ASIC verification flows and methodologies.

Responsibilities

• Develop and implement verification plans for complex ASIC designs.
• Design and maintain testbenches using SystemVerilog and UVM.
• Create and execute test cases to verify functionality, performance, and power requirements.

Skills

ASIC verification

SystemVerilog

UVM

Verilog

MATLAB

C/C++

Python

Problem-solving

Teamwork

Education

Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or related field

Job description

About The Role

Celero Communication Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world’s most advanced AI and data center infrastructure.

We are seeking a skilled and motivated ASIC Verification Engineer to join our dynamic team. You will play a key role in the development of optical transceivers for next‑generation optical modems, ensuring the functionality and reliability of our ASIC designs.

Location

Ottawa, Ontario, Canada

Key Responsibilities

• Develop and implement verification plans for complex ASIC designs.
• Design and maintain testbenches using SystemVerilog and UVM.
• Create and execute test cases to verify functionality, performance, and power requirements.
• Debug and resolve issues in collaboration with design and system teams.
• Develop and maintain reusable verification components and environments.
• Perform code and functional coverage analysis to ensure thorough verification.
• Collaborate with cross‑functional teams on system integration and validation.

Qualifications

• Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or a related field.
• 3+ years of experience in ASIC verification.
• Proficiency in Verilog, SystemVerilog, UVM.
• Strong understanding of ASIC verification flows and methodologies.
• Experience with formal verification techniques.
• Knowledge of MATLAB and C/C++ for system simulation and evaluation.
• Knowledge of low‑power design techniques.
• Excellent problem‑solving, strong communication and teamwork skills.

Preferred Skills

• Experience with scripting languages (e.g., Python, Tcl, Perl)
• Strong knowledge of Digital Signal Processing (DSP), Digital Communication, and Forward Error Correction (FEC) techniques.
• Ability to multitask and adapt to a fast‑paced, dynamic environment.

Salary Range

$150,000 - $250,000 Base Annually. The final offer will be determined based on job‑related skills, experience, qualifications, and location.