Silicon Photonics Layout Engineer – Cadence Virtuoso

RANOVUS Inc.

Ottawa

On-site

CAD 90,000 - 120,000

Full time

14 days+

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Job summary

Ranovus is seeking a Full Time Silicon Photonics Layout Designer in Ottawa to develop high-quality physical layouts for photonic ICs. You will translate schematics into manufacturable layouts, using Cadence Virtuoso and foundry PDKs, and ensure DRC/LVS compliance across complex hierarchies.

The role requires 3+ years in IC/photonic layout, experience with waveguides and photonic devices, and the ability to work with device engineers and process teams to optimize layouts for performance and yield.

Qualifications

3+ years of IC or photonic layout design experience.
Strong proficiency with Cadence Virtuoso for layout.
Hands-on LVS/DRC debugging experience.
Understanding of photonics components (waveguides, MZI, rings).
Ability to interpret schematics and netlists.

Responsibilities

Create and maintain photonic layouts using Cadence (Virtuoso) and foundry PDKs.
Implement waveguide routing and photonic devices (rings, MZIs, couplers, modulators, detectors).
Ensure layout compliance with foundry design rules (DRC) and perform LVS between schematic and layout.
Debug and resolve DRC/LVS issues, including photonic connectivity and hierarchy challenges.
Integrate optical and electrical components in compact, manufacturable floorplans.
Collaborate with design, modeling, and process teams to optimize layouts for performance, yield, and reliability.
Prepare tape-out-ready GDS files and support signoff flows.
Develop and improve layout methodologies, templates, and automation where applicable.
Document layout guidelines and contribute to best practices for PIC design.