Analog & Mixed‑Signal Layout Design Intern

Ciena Corporation; Ottawa; Hybrid; CAD 36,000 - 48,000; Part time

Job summary

Ciena in Ottawa, Ontario is offering a 4-month co-op/internship starting September/October 2026 in advanced analog/mixed-signal layout. You’ll work with senior designers on layout feasibility, floorplanning, and routing for high-speed circuits in deep sub-micron CMOS.

You'll gain hands-on experience with Cadence Virtuoso and Calibre, perform DRC/LVS/EM/IR drop checks, and collaborate across hardware teams to mitigate risks early in the design cycle.

Qualifications

• Actively enrolled in a degree program in Electrical Engineering or related field.
• Hands-on experience with custom analog and mixed-signal layout in deep sub-micron CMOS technologies.
• Strong understanding of floorplanning, device matching, parasitic minimization and IR drop considerations.
• Experience creating custom layouts for analog/mixed-signal blocks such as op-amps or current mirrors.
• Familiarity with semiconductor manufacturing processes and foundry design rules.
• Proficient with layout tools like Cadence Virtuoso and Calibre.
• Ability to interpret and debug DRC and LVS reports.

Responsibilities

• Contribute to layout feasibility studies with senior analog designers.
• Develop custom layouts for analog/mixed-signal blocks, including floorplanning and routing.
• Perform comprehensive physical verification (DRC/LVS/EM/IR drop) to ensure layout quality.
• Explore new layout tool features to improve efficiency and productivity.
• Collaborate with circuit designers and layout engineers to mitigate risks early in the design cycle.
• Provide status updates and participate in team meetings and knowledge-sharing.

Skills

Analog layout

Mixed-signal layout

Floorplanning

Device matching

Parasitic minimization

IR drop considerations

CMOS technology

DRC/LVS interpretation

Cross-team collaboration

Education

Currently enrolled in Electrical Engineering or related field

Tools

Cadence Virtuoso

Calibre

Job description

Ciena in Ottawa, Ontario is offering a 4-month co-op/internship starting September/October 2026 in advanced analog/mixed-signal layout. You’ll work with senior designers on layout feasibility, floorplanning, and routing for high-speed circuits in deep sub-micron CMOS.

You'll gain hands-on experience with Cadence Virtuoso and Calibre, perform DRC/LVS/EM/IR drop checks, and collaborate across hardware teams to mitigate risks early in the design cycle.