Senior Manager, Physical Design for AI/ML SoCs

Amazon Web Services (AWS); Toronto; On-site; CAD 180,000 - 300,000; Full time

Job summary

Amazon Development Centre Canada ULC in Toronto seeks a Senior Manager, Physical Design Engineering to lead a world‑class PD team delivering multi‑billion‑transistor ML accelerator SoCs on latest tech nodes. You will guide floorplanning, timing convergence, PDN, and 2.5D/3D integration while driving PPA, first‑pass silicon, and team scale.

You will own the PD strategy across Inferentia, Trainium, and future products, mentoring 10–15 engineers and coordinating with foundry partners, EDA vendors,

Qualifications

• 5+ years of people management leading PD teams.
• 10+ years hands-on ASIC/SoC physical design across 7nm/5nm/3nm with multiple tapeouts.
• Deep RTL-to-GDSII knowledge: floorplanning, CTS, routing, timing closure, PDN, IR‑drop signoff.
• Mastery of major EDA ecosystems: Synopsys and Cadence; verification via Calibre.
• Strong knowledge of 2nm+ node enablement and advanced packaging concepts.

Responsibilities

• Build, hire, and develop a PD team of 10–15 engineers; manage headcount and career growth.
• Own PD strategy and execution across Inferentia, Trainium, and future products.
• Drive continuous PPA improvement with metrics, dashboards, and post-tapeout reviews.
• Provide hands-on technical leadership on timing closure, PDN, high-speed I/O, and 2.5D/3D integration.
• Lead technology node enablement for 2nm and beyond; evaluate PDKs and reference flows.
• Define RTL2GDS methodologies; champion AI/ML-augmented design automation; optimize cloud PD compute.
• Collaborate with foundry and EDA partners on tool roadmaps and co-optimization.
• Oversee tapeout readiness, submittals, mask data coordination, and post-silicon learnings.

Skills

People management

PD leadership

ASIC/SoC physical design

RTL-to-GDSII flow

Floorplanning

Timing closure

PDN design

IR-drop analysis

2nm+ node experience

Scripting (TCL/Python/Perl)

Tools

Fusion Compiler/ICC2

PrimeTime

StarRC

RedHawk-SC

Innovus

Tempus

Quantus

Voltus

Calibre (DRC/LVS)

Job description

Amazon Development Centre Canada ULC in Toronto seeks a Senior Manager, Physical Design Engineering to lead a world‑class PD team delivering multi‑billion‑transistor ML accelerator SoCs on latest tech nodes. You will guide floorplanning, timing convergence, PDN, and 2.5D/3D integration while driving PPA, first‑pass silicon, and team scale.

You will own the PD strategy across Inferentia, Trainium, and future products, mentoring 10–15 engineers and coordinating with foundry partners, EDA vendors,