Principal Scientist - Software/Hardware Co-design

Huawei Canada; Markham; On-site; CAD 120,000 - 160,000; Full time

Job summary

A leading telecommunications company, Huawei Canada, is seeking a Principal Scientist for Software/Hardware Co-design. The role involves creating AI performance models, tracking hardware trends, and collaborating on low-cost, high-throughput AI solutions. Ideal candidates will have advanced degrees and extensive experience in computing algorithms and AI technologies.

Qualifications

• 5+ years of experience in low-level computing algorithm development, AI accelerators.
• Deep understanding of AI software stacks, training/inference algorithms.
• Familiarity with AI chip microarchitecture is an asset.

Responsibilities

• Build an AI performance model using AI acceleration technologies.
• Track emerging hardware designs and identify key technologies.
• Collaborate with AI research team to define co-design features for next-gen chips.

Skills

Algorithm Development

AI Accelerators

Parallel Computing

Performance Modeling

Education

Master's or Doctoral degree in Computer Science or Electronic Engineering

Job description

Principal Scientist - Software/Hardware Co-design

Join to apply for the Principal Scientist - Software/Hardware Co-design role at Huawei Canada.

About the team: The Computing Data Application Acceleration Lab aims to create a leading global data analytics platform organized into three specialized teams using innovative programming technologies. This team focuses on full-stack innovations, including software-hardware co-design and optimizing data efficiency at both the storage and runtime layers. They also develop next-generation GPU architecture for gaming, cloud rendering, VR/AR, and Metaverse applications. One goal of this lab is to enhance algorithm performance and training efficiency across industries, fostering long-term competitiveness.

About the job:

• Build an accurate and universal AI performance model based on mainstream AI acceleration technologies to support theoretical analysis.
• Track emerging hardware designs in the industry, conduct in-depth insights and survey analysis, and identify the direction of key cutting-edge technologies.
• Collaborate with the AI research team to identify key performance bottlenecks in future AI workloads, and define key algo-hw co-design features of next-generation chips for low cost, high throughput, scalability, and stability.
• Perform performance modeling of representative AI workloads with state-of-the-art training & inference algorithms on different hardware specifications for quantitative analysis of compute, memory, IO, and interconnect.
• Lead the team for breakthroughs in acceleration algorithms balancing model quality and compute efficiency.
• Track emerging algorithm-hardware co-design technologies, conduct in-depth analysis, and understand main directions and trends of cutting-edge technologies.

Job requirements:

• Master's or Doctoral degree in Computer Science or Electronic Engineering.
• At least 5+ years of experience in low-level computing algorithm development, AI accelerators, large-scale parallel computing, or high-performance system design.
• Deep understanding of large language models/multimodal models, AI software stacks (operators, compilers, acceleration libraries, frameworks), and training/inference algorithms like hybrid parallelism, low precision data formats, sparsity, P/D splitting.
• Familiarity with AI chip microarchitecture is an asset.

Seniority level

• Mid-Senior level

Employment type

• Full-time

Job function

• Engineering and Information Technology

Industries

• Telecommunications

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