Senior High-Speed Analog Architect for AI Interconnects

Celero Communications, Inc.; Vancouver; On-site; CAD 150,000 - 200,000; Full time

Job summary

Celero Communications, Inc. is seeking a Principal High-Speed Analog Circuit Design Engineer to lead the design of high-speed analog blocks for next-generation transceivers and AI interconnect tech.

You will architect circuits, supervise layouts, and drive verification across advanced process nodes from concept to silicon. The role requires a Masters or PhD in EE with 5+ years in analog design, strong tool proficiency (Virtuoso, Spectre, ADE) and experience in CMOS design flows.

Qualifications

• Master's degree and/or PhD in Electrical Engineering with 5+ years of experience.
• Strong analog design fundamentals for broadband amplification and clocking.
• Experience with analog design/verification tools (Virtuoso, Spectre, ADE).
• Experience in CMOS design/verification flows; self-heating, electromigration, SOA.
• Familiarity with EM tools (EMX, Momentum, HFSS) is a plus.
• Knowledge of electromagnetism, lumped models, high-frequency design.
• Good analog layouts in FinFET and impact on high-speed designs a plus.
• Strong communication and documentation skills.

Responsibilities

• High speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.).
• Clock generation and distribution (VCOs, PLL, clock distribution, etc.).
• Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc.).
• New techniques for the development of next generation optical transceiver.
• Design of custom passive components, from concept to silicon implementation.
• Supervise analog layouts within advanced process nodes.
• System verification and circuit design spec creation.
• Silicon bring-up, debug and support.
• Team communication and documentation.

Skills

Analog design

Clock generation

Verification tools

Education

Master's or PhD in EE

Tools

Virtuoso

Spectre

ADE

Post-layout extraction

Job description

Celero Communications, Inc. is seeking a Principal High-Speed Analog Circuit Design Engineer to lead the design of high-speed analog blocks for next-generation transceivers and AI interconnect tech.

You will architect circuits, supervise layouts, and drive verification across advanced process nodes from concept to silicon. The role requires a Masters or PhD in EE with 5+ years in analog design, strong tool proficiency (Virtuoso, Spectre, ADE) and experience in CMOS design flows.