Principal Analog Design Engineer | Irvine, CA

Celero Communications, Inc.; Ottawa; On-site; CAD 90,000 - 150,000; Full time

Job summary

Celero Communications, Inc. is seeking an experienced Analog Design Engineer to architect and deliver high-performance mixed-signal circuits for next-generation transceivers and AI infrastructure.

Grow with a fast-moving semiconductor startup and influence architecture through silicon. You will tackle high-speed analog blocks, clock generation, and system verification, collaborating with a world-class engineering team across advanced process technologies and documentation.

Qualifications

• Master’s degree and/or PhD in Electrical Engineering with 5+ years of experience.
• Strong analog design fundamentals in broadband amplification and clock generation.
• Proficient with analog design/verification tools: Virtuoso, Spectre, ADE, post-layout extraction.
• Experience with advanced CMOS design and verification flows including self-heating and safe operating area.
• Familiarity with EM simulation tools such as EMX, Momentum, HFSS is a plus.
• Excellent communication and documentation skills.

Responsibilities

• High speed analog circuit design, such as broadband amplifiers (VGA, CTLE, DRV, etc.)
• Clock generation and distribution (VCOs, PLL, clock distribution, etc.)
• Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc.)
• New techniques for the development of next generation optical transceiver
• Design of custom passive components, from concept to silicon implementation
• Supervise analog layouts within advanced process nodes
• System verification and circuit design spec creation
• Silicon bring-up, debug and support
• Team communication and documentation

Skills

Analog design fundamentals

Broadband amplifiers

Clock distribution

CMOS design & verification

EM simulation tools

Layout supervision

Documentation

Education

Master’s degree and/or PhD in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

ADE

Post-layout extraction tools

EMX

Momentum

HFSS

Job description

Are you an Analog Design Engineer passionate about building the high-speed interconnect technology powering the next generation of AI? Join our fast-growing semiconductor startup and help develop disruptive mixed-signal solutions that enable tomorrow's AI infrastructure. We are seeking experienced Analog Design Engineers to architect, design, and deliver high-performance analog and mixed-signal circuits for next-generation transceivers and other critical high-speed functions. This is an opportunity to work alongside a world-class engineering team, tackle challenging design problems in advanced process technologies, and make a direct impact on innovative products from architecture through silicon.

What You Will Do:
High speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.)
Clock generation and distribution (VCOs, PLL, clock distribution, etc.)
Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc.)
New techniques for the development of next generation optical transceiver
Design of custom passive components, from concept to silicon implementation
Supervise analog layouts within advanced process nodes
System verification and circuit design spec creation
Silicon bring-up, debug and support
Team communication and documentation

What You Will Bring:
Master’s degree and/or PhD in Electrical Engineering or related fields with 5+ years of experience
Should have strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks
Experience with analog design and verification tools (Virtuoso, Spectre, ADE, and post layout extraction tools) is a must
Experience in advance CMOS design and verification flows (tools to evaluate self-heating, electromigration, safe operating area)
Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus
Knowledge of the fundamentals on electromagnetism, lump models, and high frequency design
Good understanding of analog layouts in FinFET and its effect on high-speed designs is a plus
Strong communication and documentation skills

As set forth in Celero Communications, Inc.’s Equal Employment Opportunity policy,we do not discriminate on the basis of any protected group status under any applicable law.