Senior FPGA Design Engineer – 4G/5G Radio DSP

Stefanini North America and APAC; Ottawa; On-site; CAD 90,000 - 140,000; Full time

Benefits offered by this job

Time off accrual

Holidays

Personal days

Job summary

Stefanini North America and APAC is seeking an experienced FPGA Design Engineer with Radio experience for an onsite role in Ottawa, Ontario. The candidate will work on 4G/5G radios, develop FPGA IP, and ensure RTL blocks meet timing and integration requirements.

Ideal candidates have DSP experience in telecommunications, exposure to NR/LTE protocols, and strong verification skills using UVM. Collaboration with software teams and senior management is expected.

Qualifications

• Proven FPGA design experience and RTL development.
• DSP-focused telecom experience and 4G/5G radio exposure.
• Experience with high-speed SERDES, PCIe, AXI, and Ethernet interfaces.

Responsibilities

• Develop FPGA IP architecture for 4G/5G Radio Units.
• Implement RTL blocks (Verilog/SystemVerilog) and integrate into systems.
• Define verification plans using UVM and perform system-level validation.
• Collaborate with Radio Unit teams and software groups for hardware-software interoperability.

Skills

FPGA design

RTL development

DSP for telecom

4G/5G radio

NR/LTE/eCPRI/CPRI/PTP

Git/GitHub

UVM verification

Tools

Quartus

Vivado

MATLAB/Simulink

HDL Coder

Job description

Stefanini North America and APAC is seeking an experienced FPGA Design Engineer with Radio experience for an onsite role in Ottawa, Ontario. The candidate will work on 4G/5G radios, develop FPGA IP, and ensure RTL blocks meet timing and integration requirements.

Ideal candidates have DSP experience in telecommunications, exposure to NR/LTE protocols, and strong verification skills using UVM. Collaboration with software teams and senior management is expected.