Senior Digital ASIC Engineer, Hybrid Hearing Tech

Cochlear; Antwerpen; Hybrid; EUR 90,000 - 130,000; Full time

Benefits offered by this job

Flexible extra-legal benefits

Onboarding and training program

Life-work balance with homeworking

Global collaboration

Job summary

Cochlear is seeking a Senior Digital ASIC Engineer to shape and deliver ASIC technologies for implantable and external hearing solutions. You will contribute across the full lifecycle, from architecture to tape‑out, including silicon bring‑up and product integration.

We value hands‑on expertise in digital ASIC/FPGA design, SystemVerilog/UVM, formal verification, and scripting. This role offers Mechelen‑based hybrid work, collaboration with partners, and growth opportunities within a premier

Qualifications

• Around 7+ years of experience in digital ASIC or FPGA design, verification or integration.
• Strong knowledge of RTL, simulation, synthesis, verification and debugging.
• Experience with clock/reset, CDC/RDC, interfaces, low‑power design, DFT and silicon behaviour.
• Experience reviewing or delivering work through external ASIC design or verification partners.
• Ability to connect product requirements with design behaviour, verification evidence and real‑world implementation.
• Strong structured problem‑solving and technical communication skills.

Responsibilities

• Develop and review digital ASIC requirements covering functionality, interfaces, performance, power, reliability and test.
• Review architecture, RTL, clock/reset, CDC/RDC, low‑power implementation, DFT and verification evidence.
• Work closely with external ASIC design and verification partners, reviewing technical decisions and driving issues through to resolution.
• Identify and investigate key technical risks using simulation, formal verification, FPGA prototypes and silicon evaluation.
• Support tape‑out readiness, silicon bring‑up, characterisation, debugging and acceptance.
• Partner with hardware, embedded software, test, quality and product engineering teams through product integration.
• Use scripting, automation and AI‑assisted engineering approaches to improve reviews, testing, analysis and engineering workflows.

Skills

Digital ASIC

FPGA design

RTL

Simulation

Synthesis

Verification

Debugging

SystemVerilog/UVM

Python

DFT

Clock/Reset

CDC/RDC

Tools

FPGA prototyping

Job description

Cochlear is seeking a Senior Digital ASIC Engineer to shape and deliver ASIC technologies for implantable and external hearing solutions. You will contribute across the full lifecycle, from architecture to tape‑out, including silicon bring‑up and product integration.

We value hands‑on expertise in digital ASIC/FPGA design, SystemVerilog/UVM, formal verification, and scripting. This role offers Mechelen‑based hybrid work, collaboration with partners, and growth opportunities within a premier