Lead ASIC Physical Implementation Engineer

ENGIBEX

Vlaams-Brabant

Sur place

EUR 55 000 - 85 000

Plein temps

Il y a 17 heures
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Avantages offerts par ce poste

Training and coaching stipend

Résumé du poste

ENGIBEX in Belgium seeks a Physical Implementation engineer to lead full backend (P&R) for top-level chips and blocks, from netlist-in to GDSII-out, using Cadence Innovus Place & Route. You will collaborate with the PD team and clients to translate specs into timing budgets.

You will partition top-level SDC, drive sign-off closure, and resolve setup/hold violations, SPEF/QUANTUS extractions, and power integrity concerns, within a human-centered, growth-focused environment.

Qualifications

  • Experience setting up the flow for a specific library set and foundry node used.
  • Experience in setting up low power design (UPF) and debug SDC file.
  • Knowledge in Floorplanning & power grid design for toplevel as well as blocks.
  • Place, CTS & Routing.
  • Solve setup & hold violations.
  • Sign-off extraction (SPEF/QUANTUS) , timing (TEMPUS), Power analysis (VOLTUS).
  • Physical verification (DRC, ERC, LVS, ANT), Logic equivalence check.

Responsabilités

  • Direct contact with our customers for future projects.
  • Full understanding of the complete Cadence Innovus Place&Route flow.
  • Take the lead for partitioning and split the top level SDC file into timing budget requirements/constraints of the sub-blocks.
  • Work directly with the Physical Design implementation team during the entire chip design cycle to drive signoff closure for tape-out.
  • Technical voice to the customer to discuss his specifications

Connaissances

Floorplanning & power grid design
Sign-off coordination
Team collaboration
Problem solving
Customer communication

Outils

Cadence Innovus Place & Route
TEMPUS
VOLTUS
SPEF/QUANTUS

Description du poste

ENGIBEX in Belgium seeks a Physical Implementation engineer to lead full backend (P&R) for top-level chips and blocks, from netlist-in to GDSII-out, using Cadence Innovus Place & Route. You will collaborate with the PD team and clients to translate specs into timing budgets.

You will partition top-level SDC, drive sign-off closure, and resolve setup/hold violations, SPEF/QUANTUS extractions, and power integrity concerns, within a human-centered, growth-focused environment.

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