Memory Behavior Analysis in Accelerator-Centric Computing Systems and Chiplet-based Architectures

Imec; Vlaams-Brabant; On-site; EUR 11,000 - 17,000; Full time

Benefits offered by this job

Internship allowance

Job summary

Imec in Belgium is seeking a Master internship to study memory behavior in accelerator-centric computing systems and chiplet-based architectures. The project analyzes how memory architecture influences performance, power consumption, and thermal behavior under realistic AI workloads.

The work integrates a DRAM simulator with an AI accelerator in a chiplet system to enable end-to-end memory-traffic analysis and to explore effects of workload characteristics and memory configurations on system

Qualifications

• Master student in electrotechnics, electrical engineering or computer science.
• Interest in memory architecture and its impact on performance.
• Familiarity with AI workloads is advantageous.

Responsibilities

• Study memory behavior under realistic AI workloads.
• Integrate a DRAM simulator with an AI accelerator in a chiplet system.
• Analyze impact on DRAM performance, power consumption and thermal behavior.
• Document findings and provide design-oriented insights.

Skills

Memory systems

Performance analysis

AI workloads

Education

Electrotechnics/Electrical Engineering

Computer Science

Tools

DRAM simulator

Chiplet systems

Power modeling

Job description

Memory Behavior Analysis in Accelerator-Centric Computing Systems and Chiplet-based Architectures

Investigate how memory architecture influences performance, power consumption, and thermal behavior in accelerator-driven workloads.

This internship aims to study memory behavior under realistic AI workloads. Integrating a DRAM simulator with an AI accelerator in a chiplet system, the work enables end-to-end analysis of accelerator-generated memory traffic and its impact on DRAM performance, command activity, power consumption, and thermal behavior. Beyond establishing the integration itself, the internship will investigate how workload characteristics, memory configurations, and DRAM technologies influence system efficiency, providing a foundation for future research on memory-aware accelerator and chiplet-based system design.

Type of internship: Master internship

Duration: 4 months

Required educational background: Electrotechnics/Electrical Engineering, Computer Science

The reference code for this position is 2026-INT-294. Mention this reference code in your application.

Imec allowance will be provided.