Senior Modem ATE Test Engineer - High-Speed SoC Test

Amazon Inc.; Redmond; On-site; AUD 264,000 - 356,000; Full time

Job summary

Amazon Leo seeks a Senior Modem ATE Test Engineer to own digital ATE test development end-to-end on Advantest 93K and Teradyne UltraFLEX platforms. You will lead test pattern development, MBIST, and high-speed SERDES testing, interfacing with ASIC design, DFT, and manufacturing teams to ensure testability and cost-efficient high-volume production.

You will bring up new devices, characterize performance, and drive shmoo characterization to establish robust production limits while reducing test

Qualifications

• Bachelor's degree in electrical/computer engineering or equivalent.
• 7+ years of digital ATE test development experience, preferably in high-volume manufacturing.
• Experience testing complex SoCs and modem/wireless devices in advanced nodes (7nm and below).
• Experience developing and debugging test programs on Advantest 93K and/or Teradyne UltraFLEX platforms.
• Familiarity with JTAG/boundary-scan and DFT/DFM principles.
• Proficiency in digital test methodologies: scan/ATPG, MBIST, Vmin, loopback.
• Proficiency in high-speed SERDES test at 100G+, including equalization and jitter analysis.
• Experience with wafer sort/final test hardware bring-up and debugging.

Responsibilities

• Develop, debug, and release digital test programs for ASIC/SoC and modem devices on Advantest 93K and Teradyne UltraFLEX.
• Build and debug scan/ATPG test content for complex devices.
• Implement MBIST and memory repair flows.
• Characterize silicon performance and variation via ring oscillator and process monitor tests.
• Test and debug interfaces such as I3C, SPI, and GPIO.
• Optimize high-speed SERDES/HSIO test including jitter and eye analysis.
• Translate DFT test patterns to tester formats and validate on hardware.
• Bring up new devices and define test conditions for robust production limits.
• Lead device correlation between wafer sort and final test; reduce test time and cost.
• Design FT and WT hardware with signal integrity in mind; collaborate with design/DFT teams.
• Analyze production data to drive yield, quality, and test efficiency improvements.
• Identify readiness gaps and drive resolution throughout product lifecycle.
• Support qualification activities like HTOL and ESD; mentor junior engineers.

Skills

Digital ATE test development

7+ years experience

Advantest 93K

Teradyne UltraFLEX

JTAG boundary-scan

DFT/DFM

100G+ SERDES test

Python

Perl

Tcl/Tk

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree in Electrical/Computer Engineering

Tools

Advantest 93K

Teradyne UltraFLEX

STIL/WGL formats

Job description

Amazon Leo seeks a Senior Modem ATE Test Engineer to own digital ATE test development end-to-end on Advantest 93K and Teradyne UltraFLEX platforms. You will lead test pattern development, MBIST, and high-speed SERDES testing, interfacing with ASIC design, DFT, and manufacturing teams to ensure testability and cost-efficient high-volume production.

You will bring up new devices, characterize performance, and drive shmoo characterization to establish robust production limits while reducing test