Senior Formal Verification Engineer: AI-Driven SoC

Amazon Inc.; Redmond; On-site; AUD 264,000 - 409,000; Full time

Job summary

Amazon is seeking a Senior Formal Verification Engineer to advance our modem SoC effort in the Leo Silicon Team. You will apply rigorous mathematical methods to prove design correctness and uncover corner-case bugs beyond simulation, mentoring engineers and collaborating with RTL, DV, and architecture teams.

This role emphasizes a formal-first mindset, with opportunities to integrate AI-assisted SVA generation and advanced verification flows, across NoC, interconnects, and modem IPs, while

Qualifications

• Bachelors in Electrical/Computer Engineering or equivalent.
• 8+ years ASIC/SoC verification with a formal focus.
• Proficient in SVA and formal property specification.
• Experience with FPV, CC, register verification, equivalence and coverage.

Responsibilities

• Develop and execute formal verification strategies using JasperGold and/or Questa.
• Write, review, and debug SystemVerilog Assertions (SVA) to verify complex modem SoC designs.
• Drive convergence on proofs using abstraction and assume-guarantee techniques.
• Collaborate with RTL, architects, and DV engineers to define verification plans.
• Champion a formal-first verification approach and extend the verification checklist.
• Develop reusable formal infrastructure and CI/CD regression flows.

Skills

Formal verification

SVA

JasperGold

Questa Formal

CI/CD automation

AI/LLM in DV

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree (preferred)

Tools

JasperGold

Questa Formal

Job description

Amazon is seeking a Senior Formal Verification Engineer to advance our modem SoC effort in the Leo Silicon Team. You will apply rigorous mathematical methods to prove design correctness and uncover corner-case bugs beyond simulation, mentoring engineers and collaborating with RTL, DV, and architecture teams.

This role emphasizes a formal-first mindset, with opportunities to integrate AI-assisted SVA generation and advanced verification flows, across NoC, interconnects, and modem IPs, while