Senior FPGA Engineer - Low-Latency Trading Systems

Tradermath; Sydney; Hybrid; AUD 120,000 - 180,000; Full time

Benefits offered by this job

Hybrid model

Flat structure

People-first culture

Job summary

VivCourt is seeking an FPGA Engineer to join a collaborative team building high-performance, low-latency FPGA systems for electronic trading. You will contribute across the development lifecycle, owning the systems you build and engaging in technical discussions shaping our FPGA platform.

Ideal candidates bring strong FPGA/ASIC experience with SystemVerilog or VHDL, plus Python or C++ development and a focus on solving complex problems. Hybrid work model offered.

Qualifications

• Experience in FPGA/ASIC development using SystemVerilog or VHDL.
• Strong problem-solving skills and ability to tackle complex issues.
• Experience with modern verification frameworks.
• Proficiency in Python or C++ development.

Responsibilities

• Contribute to FPGA architecture, verification, synthesis, timing and integration.
• Work closely with traders and software engineers to understand requirements.
• Design and optimise FPGA systems for performance and low, predictable latency.
• Drive improvements across our FPGA platform.

Skills

FPGA/ASIC development

SystemVerilog / VHDL

Python / C++ development

Problem-solving

Tools

Modern verification frameworks

Job description

VivCourt is seeking an FPGA Engineer to join a collaborative team building high-performance, low-latency FPGA systems for electronic trading. You will contribute across the development lifecycle, owning the systems you build and engaging in technical discussions shaping our FPGA platform.

Ideal candidates bring strong FPGA/ASIC experience with SystemVerilog or VHDL, plus Python or C++ development and a focus on solving complex problems. Hybrid work model offered.