Senior ASIC Design Engineer — Remote/Hybrid

Motion Recruitment; Adelaide; Hybrid; AUD 140,000 - 210,000; Full time

Benefits offered by this job

Fully remote working option

Job summary

Motion Recruitment is seeking an experienced ASIC Design Engineer for Adelaide, Sydney or Melbourne, with hybrid or remote work options across Australia. The role spans architecture through to implementation and verification of digital ASICs.

You will collaborate with FPGA, firmware, hardware and systems engineers on technically challenging projects, involving RTL development, verification and timing analysis.

Qualifications

• ASIC design and RTL development.
• Verilog and/or SystemVerilog.
• Digital architecture and microarchitecture.
• RTL design, synthesis and timing analysis.
• ASIC verification and simulation.
• FPGA development and digital systems.
• Design tools and semiconductor development flows.
• Working within multidisciplinary engineering teams.

Responsibilities

• Design and develop ASICs for complex digital systems.
• Contribute to ASIC architecture and microarchitecture development.
• Develop and optimise RTL using Verilog and/or SystemVerilog.
• Work closely with verification and FPGA engineers.
• Support synthesis, timing analysis and implementation activities.
• Review designs and contribute to design optimisation.
• Develop technical documentation and design specifications.
• Support integration, debugging and verification.
• Identify and resolve technical design issues.
• Engage with customers and provide technical input throughout projects.

Skills

ASIC design

RTL development

Verilog

SystemVerilog

Digital architecture

Timing analysis

ASIC verification

FPGA development

Tools

Synthesis tools

Verification tools

Job description

Motion Recruitment is seeking an experienced ASIC Design Engineer for Adelaide, Sydney or Melbourne, with hybrid or remote work options across Australia. The role spans architecture through to implementation and verification of digital ASICs.

You will collaborate with FPGA, firmware, hardware and systems engineers on technically challenging projects, involving RTL development, verification and timing analysis.