Innovative Analog IC Design Engineer

Apple Inc.; Melbourne; On-site; AUD 140,000 - 210,000; Full time

Job summary

Apple Inc. in Melbourne seeks an IC Designer to advance analog IC blocks, conduct transistor‑level feasibility studies, and drive mask layout while aligning with production test plans.

You will perform top‑level simulations, validate integration with layout, design for ESD, take lab measurements, and collaborate with test engineers to optimize yield, matching ADC/DAC architectures and precision analog techniques.

Bachelor's degree required; experience with Matlab/Verilog modeling is preferred.

Qualifications

• Minimum Bachelor’s degree required.
• Deep knowledge of ADC/DAC architectures and which are suitable for given applications is preferred.
• Extensive experience with low noise design techniques and high precision design in presence of device mismatch.
• Proven experience with C/ Matlab/ Verilog modeling.
• Strong device physics knowledge as it applies to analog IC designs.
• Experience using spectrum analyzers, oscilloscopes, signal generators to validate analog designs.
• Experience collaborating with production test engineers to finalize test plans and design for testability.

Responsibilities

• Involved in specifications of analog portions of IC.
• Behavioral modeling to validate architectures.
• Transistor-level feasibility studies for blocks in ADC/DAC.
• Crafting blocks and documenting design towards formal design reviews.
• Drive mask design to implement layout view of designs.
• Top-level simulations to validate top-level integration.
• Defining production/bench-level test-plans.
• Taking lab measurements to validate analog designs.
• Driving/reviewing yield/lab test results to drive bug fixes.
• Design for ESD compliance.

Skills

ADC/DAC architectures

Low noise design

High precision techniques

Device physics knowledge

Analog IC design

Behavioral modeling

Education

Bachelor's degree

Tools

MATLAB

Verilog

C

Job description

Apple Inc. in Melbourne seeks an IC Designer to advance analog IC blocks, conduct transistor‑level feasibility studies, and drive mask layout while aligning with production test plans.

You will perform top‑level simulations, validate integration with layout, design for ESD, take lab measurements, and collaborate with test engineers to optimize yield, matching ADC/DAC architectures and precision analog techniques.

Bachelor's degree required; experience with Matlab/Verilog modeling is preferred.