Senior Staff IC Layout Engineer (d/m/f)

OSRAM Opto Semiconductors (Malaysia) Sdn Bhd; Premstätten; Hybrid; EUR 70,000 - 100,000; Full time

Job summary

ams OSRAM AG in Austria seeks an experienced IC Layout Designer for analog/digital mixed-signal sensors. You will develop layouts, optimize for SI/PI/HF, and verify with Cadence tools and Calibre.

Requirements include a 6+ year background in semiconductors, strong English, and familiarity with RF concepts. Hybrid work model with competitive compensation is offered.

Qualifications

• Bachelor's or master's degree in Electrical Engineering, Microelectronics, Semiconductor Physics, Computer Engineering, or related field.
• Minimum 6 years in Semiconductor/Electronics industry.
• Strong experience with Cadence Virtuoso Suite (Virtuoso, PVS, Quantus).
• Experience with Cadence Virtuoso Suite and Physical Verification Tools such as Siemens Calibre/Cadence PVS; Synopsys IC Custom Compiler and IC Validator is a benefit.
• Knowledge of semiconductor processes, analog/mixed-signal design considerations, and RF concepts.

Responsibilities

• Design and develop IC layouts for analog sensors and mixed-signal applications, ensuring compliance with electrical and manufacturing requirements.
• HF-aware component placement and routing, including controlled impedance structures, differential pairs, waveguides, and digital photonic implementations.
• Optimize layout for signal integrity, power integrity, and HF performance, minimizing EMI and losses.
• Create and verify IC layouts using Cadence Virtuoso Suite, Cadence PVS and Siemens Calibre.
• Collaborate with IC analog design and package engineers to support IP development and chip-package-board co-design; support simulations with SI/PI/EM extraction tools.
• Perform design verification and manufacturability reviews, including LVS/DRC/DFM/ERC checks.

Skills

Technical English

Education

Bachelor's or Master's in Electrical Engineering / Microelectronics / Semiconductor Physics

Tools

Cadence Virtuoso Suite

Siemens Calibre

Cadence PVS

Synopsys IC Custom Compiler

Synopsys IC Validator

Job description

The ams OSRAM Group is a global leader in innovative light and sensor solutions. As a specialist in Digital Photonics, we combine technological excellence with state-of-the-art global manufacturing capabilities to offer our customers the broadest portfolio of digital emitter and sensor technologies.
Globally, our teams develop groundbreaking solutions aligned with societal megatrends like intelligent mobility, artificial intelligence, augmented reality, smart health, and robotics.
At ams OSRAM, employees are part of a highly innovative, international technology environment. Diverse teams, a high degree of ownership, and exciting challenges provide the opportunity to grow, develop, and make a real difference. Because behind our innovations are people who carry something special inside and who bring their unique strengths to work every day.

Show the world what you are made of.

Your new responsibilities

• Design and develop IC layouts for analog sensors, and mixed-signal applications, ensuring compliance with electrical and manufacturing requirements
• Perform HF-aware component placement and routing, including controlled impedance structures, differential pairs, waveguides, and digital photonic implementations
• Optimize layout for signal integrity (SI), power integrity (PI), and HF performance, minimizing coupling, crosstalk, insertion loss, return loss, and electromagnetic interference (EMI)
• Create and verify IC layouts using Cadence Virtuoso Suite, Cadence PVS and Siemens Calibre
• Collaborate with IC analog design and package engineers to support IP development as well as chip-package-board co-design and ensure successful integration of high-precision circuits and support for simulation activities using SI/PI/EM extraction tools
• Perform design verification and manufacturability reviews, including LVS/DRC/DFM/ERC checks, fabrication rule compliance and parasitic extractions

Who we are looking for

• Bachelor's or Master's Degree in Electrical Engineering, Microelectronics, Semiconductor Physics, Computer Engineering, or a related field
• Minimum of 6 years experience in Semiconductor/Electronic Industry
• Strong experience with Cadence Virtuoso Suite (Virtuoso, PVS, Quantus)
• Experience with Cadence Virtuoso Suite and Physical Verification Tools such as Siemens Calibre/Cadence PVS is a must.Experience with Synopsys IC Custom Compiler and IC Validator is a clear benefit
• Knowledge of semiconductor processes, analog/mixed-signal design considerations, and ESD/EMC concepts is considered a strong benefit
• Knowledge of controlled impedance routing, electromagnetic coupling, grounding strategies, shielding concepts, and RF matching networks
• Experience with IC package substrates, wirebond and flip-chip packaging is beneficial
• CMOS IC layout experience, providing valuable expertise in parasitic control, matching techniques, device placement, shielding concepts, and chip-package-board co-design
• Good technical English is a must, German is beneficial

We offer competitive salaries and additional benefits based on your performance, experience and qualification.
The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group G ( https://www.feei.at/aktuelles/mindestloehne-und-gehaelter-eei/) .
We offer a higher compensation depending on your expertise and skills.

ams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities.

Information at a Glance Job ID: 24093 Posting Start Date: 8/31/26 Job Family: Research & Development Career Level: Professional (> 3 years) Company: ams-OSRAM AG Schedules: Full Time Work Model: Hybrid Job Shift: Flex time Regular/Temporary: Regular Department: LSP Physical Design Local Job Grade: G