Senior FPGA Firmware & Signal Processing Engineer

EMTensor GmbH; Wien; Vor Ort; EUR 60.000 - 90.000; Vollzeit

Zusammenfassung

EMTensor GmbH in Austria seeks an experienced FPGA Engineer to redesign firmware for imaging modules. You will write RTL, build test benches, and validate designs end-to-end from ADCs through DSP to the bus frame, with no OS.

The role emphasizes robust timing, fixed-point DSP, and cross-vendor toolchain experience, including Intel Quartus and Xilinx Vivado. You will test against Python/ MATLAB models and verify bench performance.

Qualifikationen

• 4+ years of production FPGA development — shipped hardware, not evaluation boards.
• Strong RTL design in Verilog, SystemVerilog or VHDL: finite state machines, synchronous design, parameterised modules.
• Willingness to work in Intel toolchain (Quartus) and show cross-vendor experience with Xilinx Vivado.
• Timing discipline: static timing analysis, SDC constraints, setup/hold, clock-domain crossing, metastability.
• DSP in fixed point: FIR/IIR, CIC, FFT/DFT, quad processing, truncation and saturation.
• Board-level interfaces: LVDS, SPI, I2C, UART, multipoint buses.

Aufgaben

• Design end-to-end FPGA firmware from ADC pins through DSP chain to the bus frame.
• Write RTL and testbench code and validate against a reference model.
• Configure and verify boot and update paths across a large module network.
• Develop self-checking tests and perform bench debugging with proper tooling.

Kenntnisse

FPGA design

Verilog/SystemVerilog/VHDL

Timing analysis

DSP fixed-point

RTL testbench

DFT/FFT/DS components

Tools

Quartus Prime/II

Vivado

ModelSim/QuestaSim/Verilator

Python (NumPy)

Jobbeschreibung

EMTensor GmbH in Austria seeks an experienced FPGA Engineer to redesign firmware for imaging modules. You will write RTL, build test benches, and validate designs end-to-end from ADCs through DSP to the bus frame, with no OS.

The role emphasizes robust timing, fixed-point DSP, and cross-vendor toolchain experience, including Intel Quartus and Xilinx Vivado. You will test against Python/ MATLAB models and verify bench performance.