Yield Optimization Lead – Wafer Fab

Renesas Electronics Corporation; Palm Bay (FL); On-site; USD 120,000 - 170,000; Full time

Benefits offered by this job

Medical, Dental, Vision Insurance from

3 weeks vacation per year

13 paid Holidays per year

401K with employer matching up to 6%

Tuition Reimbursement

Profit Sharing Bonus

Job summary

Renesas Electronics Corporation in Palm Bay, FL, is seeking a Senior Wafer Fab Yield Engineer to drive systematic yield improvements across wafer fabrication. You will analyze process data, inline metrology, defects, and electrical test to identify yield-loss mechanisms and lead corrective actions.

This onsite role collaborates with Process, Equipment, Failure Analysis, Quality, and Manufacturing to reduce variability, run structured experiments, and mentor junior engineers.

Qualifications

• Bachelor's degree in Electrical Engineering, Applied Physics, or a related technical discipline.
• Significant engineering experience in semiconductor wafer fabrication with yield, process integration, or device engineering.

Responsibilities

• Lead wafer-fab yield improvement initiatives, identifying and prioritizing dominant yield-loss mechanisms and converting analysis into actionable improvement projects.
• Analyze wafer probe maps, electrical test/bin data, inline metrology, defect inspection data, equipment/process history, and lot genealogy to isolate sources of yield loss.
• Perform correlation, regression, and statistical analysis to identify relationships between process conditions and electrical yield.
• Lead root-cause investigations involving process excursions, recurring yield degradation, and equipment effects.
• Partner with Process and Equipment Engineering to translate yield signatures into physical hypotheses and validate corrective actions.
• Define and execute structured experiments and DOE to validate suspected yield drivers.
• Use SPC and process-capability analysis to identify process variation and opportunities for manufacturing control.
• Correlate WAT, wafer sort, inline process-monitoring data to identify yield improvement opportunities.
• Work with Failure Analysis to develop physical-analysis plans and translate findings into actions.
• Develop analyses and reports communicating yield trends, excursions, root causes, and project status.
• Lead cross-functional technical reviews for significant yield excursions.
• Support new-product/technology introduction by identifying yield risks during ramp.
• Mentor engineers in statistical analysis, problem solving, and fab troubleshooting.
• Identify opportunities to improve fab-wide yield-analysis methods and data infrastructure.

Skills

Statistical analysis

DOE

Root-cause analysis

Cross-functional collaboration

Data mining

Education

Bachelor's degree in Electrical Engineering, Applied Physics, or related technical discipline

Tools

JMP

Job description

Renesas Electronics Corporation in Palm Bay, FL, is seeking a Senior Wafer Fab Yield Engineer to drive systematic yield improvements across wafer fabrication. You will analyze process data, inline metrology, defects, and electrical test to identify yield-loss mechanisms and lead corrective actions.

This onsite role collaborates with Process, Equipment, Failure Analysis, Quality, and Manufacturing to reduce variability, run structured experiments, and mentor junior engineers.