Yield Enhancement Engineer (RFAB)

Texas Instruments; Richardson (TX); On-site; USD 90,000 - 120,000; Full time

Job summary

Texas Instruments is seeking an experienced Yield Enhancement Engineer in Richardson, Texas, to lead end-to-end yield improvement within the analog and mixed-signal product portfolio. This role requires the engineer to drive defect reduction and implement AI/ML techniques for defect classification.

The ideal candidate should have strong experience in data-driven analysis and collaboration with engineering teams. Responsibilities include defect analysis, predictive modeling, and working closely with Quality Assurance for defect detection.

Qualifications

• Experience in yield management and defect analysis in semiconductor manufacturing.
• Strong understanding of data analytics and AI/ML techniques.
• Ability to work in a high-paced, automated fab environment.

Responsibilities

• Lead data-driven defect-limited yield analysis across all product families.
• Triage data and mobilize cross-functional teams for defect resolution.
• Apply wafer map analytics to fingerprint yield-limiting defects.
• Define inspection strategies balancing sensitivity, throughput, and cost.
• Build predictive yield models correlating defect density with test outcomes.
• Partner with Quality Assurance on defect detection.

Skills

Data-driven analysis

Defect investigation

Machine learning techniques

Cross-functional collaboration

Job description

Change the world. Love your job. TI-RFAB is looking for an experienced Yield Enhancement Engineer to own end-to-end yield improvement across our analog and mixed-signal product portfolio. The engineer will drive defect reduction from detection to root-cause analysis through permanent corrective action and apply modern AI/ML techniques to accelerate defect classification and yield learnings. The engineer will be required to work closely with Process, Product, Integration, and Equipment Engineering teams in a high‑paced, fully automated fab environment.

The responsibilities of a Yield Enhancement Engineer in this role include:

• Lead data-driven defect-limited yield analysis across all product families, from defect discovery through root-cause investigation to corrective action.
• Serve as a key technical responder for defect excursions with the ability to triage data and mobilize cross-functional teams quickly to resolution.
• Apply wafer map analytics to fingerprint yield‑limiting defects by toolset, chamber, reticle field etc.
• Define and continuously improve inline inspection sampling strategies, balancing detection sensitivity, throughput, and cost.
• Build predictive yield models by correlating inline defect density with electrical test outcomes and liaise with the process modules to implement virtual metrology to ultimately enable real‑time risk scoring.
• Partner with Quality Assurance to close the loop between customer‑observed failures and in‑fab defect detection.