Validation Engineer

VIVA USA Inc

San Jose (CA)

On-site

USD 130,000 - 180,000

Full time

35 hours ago
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Job summary

VIVA USA Inc is seeking a senior engineer to join a highly technical team that develops test plans and validates processor silicon interfaces with a strong focus on power management. You will write comprehensive electrical and functional test plans, and execute validation using hardware and software tools.

The ideal candidate has 8–10 years of relevant experience, a degree in EE/CE (Bachelor's or Master's), and proficiency with oscilloscopes and schematics, plus strong communication to work

Qualifications

  • Bachelor's in Electrical Engineering or Computer Engineering with 8-10 years of related experience; Masters plus 8+ years is a plus.
  • Platform level electrical characterization experience with processor I/O interfaces preferred.
  • Experience debugging processor & PC platform I/O interfaces.
  • Experience with oscilloscopes, reading schematics and layout docs; MS Windows and Office.
  • Good written and oral communication; ability to collaborate across engineering teams.

Responsibilities

  • Develop comprehensive electrical & functional test plans for processor interface validation.
  • Execute electrical & functional test plans for client processors using hardware & software validation tools, oscilloscopes & logic analyzers.
  • Debug electrical & functional issues for new processors.
  • Provide input into platform definition & review of platform designs for silicon validation.
  • Provide technical guidance and training to less experienced engineers and technicians.

Skills

Test planning
Debugging
Mentoring/Training
Team collaboration
Problem solving

Education

Bachelor's in Electrical Engineering or Computer Engineering
Master's degree (advantage)

Tools

Oscilloscopes
Logic analyzers
Schematic reading
MS Windows
MS Office

Job description

JOB DUTIES:

In this role, this engineer will be part of a highly technical team that develops test plans, completes functional & electrical validation, & debugs issues for new processor silicon interface features with strong focus on power management. Writes comprehensive electrical & functional test plans for the processor interface validation of processors. Executes electrical & functional test plans for client processors using hardware & software validation tools, oscilloscopes, & logic analyzers. Debug of electrical & functional issues for new processors. Provides detailed input into the platform definition & review of platform designs used in the silicon validation of new processors. Provides technical guidance and training to less experienced engineers and technicians in the planning, test, & debug processor validation.

EXPERIENCE AND EDUCATION:

  • Bachelors in Electrical Engineering or Computer Engineering with 8-10 years of related experience;or Masters plus at least 8+ years directly related experience (an advanced degree will be considered a plus);Requires experience and demonstrated technical expertise in the development & execution of platform level electrical & functional test plans;
  • Platform level electrical characterization experience with processor I/O interfaces is considered, preferred;
  • Requires experience and demonstrated technical expertise in the debug of processor & PC platform I/O interfaces.
  • Demonstrated experience with or knowledge using oscilloscopes, reading schematics and layout documentation, and MS Windows and Office applications;
  • Requires good written and oral communication skills;
  • Demonstrate the ability to communicate with a variety of engineering disciplines and management.

SerDes and Optical link validation (Optical link system level validation) are highly preferred

VIVA is an equal opportunity employer. All qualified applicants have an equal opportunity for placement, and all employees have an equal opportunity to develop on the job. This means that VIVA will not discriminate against any employee or qualified applicant on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability or protected veteran status

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