Technical Program Manager, ASIC

Meta; Bellevue (WA); On-site; USD 168,000 - 234,000; Full time

Job summary

The Meta Product Technical Program Management (TPM) community is pioneering technologies to bring people (and businesses) closer together at a global scale. Product TPMs work at the cross-section between technical execution and business strategy and are expected to partner closely with Engineering and Product teams.

Being a TPM at Meta means driving impact by delivering measurable results across a wide range of areas.

Qualifications

• BS degree in Computer Science, Computer/Electrical Engineering or other technical field.
• 10+ years of experience in ASIC development.
• 2+ years in Program/Product Management or Engineering Management with leadership in delivering products.
• Demonstrated ability to manage from technical details to big picture.
• Experience in ASIC design flow (RTL, Synthesis, verification, layout).
• Experience in pre-silicon testing with Emulation, FPGA and post-silicon validation.
• Proven stakeholder management and cross-functional collaboration.
• Experience leading cross-functional programs, defining milestones and driving execution.

Responsibilities

• Manage cross-functional infrastructure programs in a matrix organization across Silicon Eng., Platform Software, Hardware Systems, Sourcing & Operations, and vendors.
• Drive and manage ASIC development and subsystems with vendors from concept to production.
• Provide hands-on program management during all silicon and firmware development phases.
• Engage with stakeholders to define product development roadmaps.
• Drive program execution to deliver high quality ASIC solutions.
• Drive internal process improvements across multiple teams and functions.
• Collaborate with software and hardware architecture teams to understand requirements and constraints.

Skills

ASIC development

Program management

Cross-functional collaboration

System architecture understanding

Emulation/FPGA testing

RTL design familiarity

Education

BS degree in CS/EE or technical field

Tools

Verilog

SystemVerilog

VHDL

Emulation tools

Job description

Summary

The Meta Product Technical Program Management (TPM) community is pioneering technologies to bring people (and businesses) closer together at a global scale. Product TPMs work at the cross-section between technical execution and business strategy and are expected to partner closely with Engineering and Product teams. Being a TPM at Meta means driving impact by delivering measurable results across a wide range of areas. You'll be responsible for defining and guiding high-level goals and roadmaps, monitoring and communicating progress, and defining functional requirements for new products and features. It also means having a technical background in system architecture and cross-functional product delivery, understanding system architecture, and the experience to effectively collaborate across functions and organizations to deliver impact.This role is for a Technical Program Manager with ASIC design and development experience. This Technical Program Manager will lead cross-functional and multi-site teams on delivering ASICs to enable Meta's Infrastructure Engineering organization, whose responsibilities include the growth, management and 24x7 upkeep of Meta's family of apps. This is a full-time position reporting to the Group Technical Program Manager.

Technical Program Manager, ASIC Responsibilities

1. Manage cross-functional infrastructure programs in a matrix organization covering a range of functional areas in Silicon Engineering, Platform Software, Hardware Systems, Sourcing & Operations and vendors
2. Drive and manage ASIC development and their subsystems with vendors, from concept to production
3. Provide hands-on program management during all phases of silicon and firmware development from concept, design, development, fabrication, validation, qualification and production release phases
4. Engage with stakeholders to define product development roadmaps
5. Drive program execution to deliver high quality ASIC solutions
6. Drive internal process improvements across multiple teams and functions
7. Work with the software, hardware, architecture teams to understand requirements and constraints

Minimum Qualifications

1. BS degree in Computer Science, Computer / Electrical Engineering or other technical field
2. 10+ years of experience in ASIC development
3. 2+ years of experience in Program/Product Management or Engineering Management with proven leadership in delivering successful products
4. Demonstrated experience to manage from technical details to big picture
5. Experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional verification, physical layout etc.)
6. Experience in pre-silicon testing with Emulation, FPGA and post-silicon validation
7. Proven stakeholder management skills, including relationship building and collaboration within a cross-functional team
8. Experience leading cross-functional programs by defining milestones, coordinating across teams, and driving execution to delivery

Preferred Qualifications

1. Hands-on RTL design experience with VHDL/Verilog/SystemVerilog and modern Design Verification methodologies
2. Experience working with ODMs/vendors
3. Familiarity with Machine Learning training or inference silicon and systems
4. Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
5. Work experience in semiconductor start-ups
6. Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
7. Experience with data center architecture and deployment
8. Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
9. Familiar with semiconductor technology and manufacturing processes

Public Compensation

$168,000/year to $234,000/year + bonus + equity + benefits

Industry

Internet

Equal Opportunity

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