Systems Quality Engineer I - Co-op Opportunity

Cisco; Maynard (MA); On-site; USD 44,000 - 185,000; Full time

Job summary

Cisco's Core ASIC Group in the United States is seeking qualified undergraduates for a 6‑month co‑op internship focused on design, development and verification of high‑performance ASICs and networking processors. You will work on system architecture, Ethernet processing, and DSP topics as part of a collaborative, cross‑functional team.

The role emphasizes strong engineering fundamentals, hands-on RTL design experience (VHDL/Verilog), and familiarity with ASIC design flows and EDA tools.

Qualifications

• Currently enrolled in an undergraduate degree program (Associate's or Bachelor's)
• Qualifying education should be in Electrical Engineering, Computer Engineering, or a related field
• Expected to continue enrollment in degree program following completion of the internship
• Solid understanding of engineering fundamentals and technical problem-solving skills
• Familiarity with ASIC design flow, including RTL (Register Transfer Level) design using hardware description languages like VHDL or Verilog, simulation, synthesis, timing analysis, and verification. Knowledge of EDA (Electronic Design Automation) tools used in the ASIC design process is also beneficial.
• Able to commit to a 6-month co-op program.

Responsibilities

• Participate in the design, development, and verification of high-performance communications processors and ASICs for a wide range of Cisco’s products.
• Work on system architecture, network processor (NPU) architecture, Ethernet processing, digital signal processing, modeling, high-speed logic design & verification, custom processor development, dense memory designs, and packaging technology.
• Collaborate with cross-functional teams across marketing, hardware, software, and product engineering to bring Cisco products to market.

Skills

Engineering fundamentals

Communication

RTL design

Education

Undergraduate degree program in Electrical or Computer Engineering

Tools

EDA tools

Job description

Cisco's Core ASIC Group in the United States is seeking qualified undergraduates for a 6‑month co‑op internship focused on design, development and verification of high‑performance ASICs and networking processors. You will work on system architecture, Ethernet processing, and DSP topics as part of a collaborative, cross‑functional team.

The role emphasizes strong engineering fundamentals, hands-on RTL design experience (VHDL/Verilog), and familiarity with ASIC design flows and EDA tools.