System Architect

Jobtailor; California (MO); On-site; USD 120,000 - 170,000; Full time

Job summary

Jobtailor is seeking an experienced performance modeling architect to develop and calibrate cycle-accurate models for memory systems and SoC subsystems. You will analyze AI, server, and mobile workloads and select tools to build robust performance metrics.

You will collaborate with cross-functional teams and external customers to guide microarchitecture tradeoffs, and integrate models into larger performance frameworks to identify bottlenecks and propose improvements.

Qualifications

• Bachelor's/Master's/PhD in a related technical field.
• 5+ years in system architecture, performance modeling, or memory systems.
• Experience developing cycle-accurate models for interconnects/mmemory controllers.
• Strong hardware modeling knowledge and simulation environments.

Responsibilities

• Develop, calibrate, maintain timing-approximate and cycle-accurate models of memory devices and SoC subsystems.
• Perform component- and system-level performance analysis across AI, server, and mobile workloads.
• Select tools, generate workloads, and build performance monitoring (latency, bandwidth, energy).
• Collaborate with cross-functional teams and customers on architecture tradeoffs.
• Integrate models into larger performance frameworks and identify bottlenecks.

Skills

Performance modeling

Cycle-accurate modeling

C++

Python

Hardware knowledge

Education

Bachelor's degree in EE/CS

Master's or PhD preferred

Tools

SystemC

Verilog

Simics

Job description

Responsibilities

• Develop, calibrate, and maintain timing-approximate and cycle-accurate models of memory devices, controllers, interconnects, processors, and SoC subsystems.
• Perform component- and system-level performance analysis, benchmarking, and characterization across AI, server, and mobile workloads.
• Select simulation tools and environments, generate or acquire representative workloads, and build performance monitoring for metrics such as latency, bandwidth, energy, and cycle-level statistics.
• Collaborate with cross-functional teams and external customers to optimize architectures and provide data-driven guidance on microarchitecture tradeoffs.
• Integrate and document models into larger SoC- and platform-level performance frameworks, identifying bottlenecks and recommending corrective actions.

Requirements

• Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field
• 5+ years of professional experience in system architecture, performance modeling, computer architecture, SoC design, or memory systems
• Demonstrated experience developing cycle-accurate models for interconnects and memory controllers in large SoC projects
• Strong knowledge of hardware systems modeling, including modeling languages and simulation environments
• Proficiency with programming and scripting languages such as C++ or Python.