Summer ATE Process Engineer Intern: Yield Optimization

Micron Technology; Boise (ID); On-site; USD 28,000 - 41,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Job summary

Micron Technology in Boise is offering an ID1 High Volume Manufacturing Process Engineer Intern role focused on process optimization, yield improvement and cost reduction. You will collaborate with equipment teams, operations leaders and cross-functional partners to ensure area metrics are met and wafer output is optimized.

Candidates must be engineering students with knowledge of SPC and DOE, and programming skills in Python or Java, plus data visualization with Tableau or Matlab.

Qualifications

• Currently enrolled in an engineering or related degree program; graduation date not before September 2027.
• Understanding of SPC and Design of Experiments.
• Proficiency in one or more scripting/programming tools (Python, Java) and visualization tools (Tableau, Matlab, Microsoft Suite).
• Ability to commit to 40 hours/week during Summer 2026 and 20 hours/week part-time during Fall 2026/Spring 2027.

Responsibilities

• Finish required safety training and adhere to safety policies and laws.
• Ensure proper tool documentation and update reaction mechanisms as needed.
• Supervise and resolve issues impacting yield, excursions, defects, or output loss.
• Apply SPC, FDC, and 8D methodologies to optimize processes and improve tool availability.
• Analyze data using engineering knowledge and visualization tools to make critical process decisions.
• Perform project work to optimize wafer processing and increase wafer outs.
• Update or create procedures to align with area and global practices.

Skills

SPC

Design of Experiments

Python

Java

Education

Engineering student (graduation Sept 2027 or later)

Tools

Tableau

Matlab

Microsoft Office

Job description

Micron Technology in Boise is offering an ID1 High Volume Manufacturing Process Engineer Intern role focused on process optimization, yield improvement and cost reduction. You will collaborate with equipment teams, operations leaders and cross-functional partners to ensure area metrics are met and wafer output is optimized.

Candidates must be engineering students with knowledge of SPC and DOE, and programming skills in Python or Java, plus data visualization with Tableau or Matlab.