Summer 2027 FPGA Design/Verification Intern (Electrical)

Woven; Melbourne (FL); On-site; USD 28,000 - 41,000; Full time

Benefits offered by this job

Onsite internship

Competitive compensation

Job summary

CesiumAstro is seeking Summer 2027 interns to apply digital design and verification principles to FPGA development for satellite communication systems. Interns will work closely with engineers on RTL design or verification, including testbenches, constrained-random stimulus, and verification coverage.

Prior FPGA coursework not required; a strong foundation in digital design and an interest in applying those skills to FPGA development are valued.

Qualifications

• Enrollment in BS/MS/PhD program in Electrical or Computer Engineering.
• Understanding of digital design concepts and sequential logic.
• Experience with digital design or HDL through coursework or projects.
• Ability to learn, debug, and tackle technical problems methodically.
• Excellent written and verbal communication skills.

Responsibilities

• Apply digital design and verification principles to FPGA development.
• Work on RTL for high-speed interfaces and data processing cores.
• Develop testbenches and verification environments.
• Present work to peers and leadership during the internship.

Skills

Digital design fundamentals

Communication skills

Hardware design mindset

Education

BS/MS/PhD in Electrical Engineering or Computer Engineering

Tools

SystemVerilog

Verilog

VHDL

UVM

Job description

CesiumAstro is seeking Summer 2027 interns to apply digital design and verification principles to FPGA development for satellite communication systems. Interns will work closely with engineers on RTL design or verification, including testbenches, constrained-random stimulus, and verification coverage.

Prior FPGA coursework not required; a strong foundation in digital design and an interest in applying those skills to FPGA development are valued.