Summer 2027 - Electrical Engineering Internship, FPGA

Woven; Melbourne (FL); On-site; USD 28,000 - 41,000; Full time

Benefits offered by this job

Onsite internship

Competitive compensation

Job summary

CesiumAstro is seeking Summer 2027 interns to apply digital design and verification principles to FPGA development for satellite communication systems. Interns will work closely with engineers on RTL design or verification, including testbenches, constrained-random stimulus, and verification coverage.

Prior FPGA coursework not required; a strong foundation in digital design and an interest in applying those skills to FPGA development are valued.

Qualifications

• Enrollment in BS/MS/PhD program in Electrical or Computer Engineering.
• Understanding of digital design concepts and sequential logic.
• Experience with digital design or HDL through coursework or projects.
• Ability to learn, debug, and tackle technical problems methodically.
• Excellent written and verbal communication skills.

Responsibilities

• Apply digital design and verification principles to FPGA development.
• Work on RTL for high-speed interfaces and data processing cores.
• Develop testbenches and verification environments.
• Present work to peers and leadership during the internship.

Skills

Digital design fundamentals

Communication skills

Hardware design mindset

Education

BS/MS/PhD in Electrical Engineering or Computer Engineering

Tools

SystemVerilog

Verilog

VHDL

UVM

Job description

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.

At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team.

The CesiumAstro FPGA team is looking for Summer 2027 interns to apply digital design and verification principles to FPGA's for satellite communication systems.

FPGA interns will work closely with CesiumAstro engineers on FPGA's through multiple phases of the development process. Interns will primarily focus on either FPGA design or FPGA verification, based on project needs, experience, and interests.

FPGA Design assignments may include developing and testing RTL for high-speed serial interfaces and data streams, digital processing cores, multiple clock domains, and management interfaces.

FPGA Verification assignments may include developing testbenches and verification environments, creating test scenarios, generating constrained-random stimulus, checking expected behavior, debugging failures, and measuring verification coverage.

Assignments will be determined by a mix of project availability and the interests of the successful candidates.

Prior FPGA-specific coursework or experience is not required. We recognize that access to FPGA courses, development boards, commercial tools, and verification environments varies among universities. We are looking for candidates with a strong foundation in digital design or software-based verification concepts and an interest in applying those skills to FPGA development.

CesiumAstro interns regularly present their work to peers, mentors, and CesiumAstro executive leadership throughout the course of the summer. As such, excellent written and verbal communication skills are required.

JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS

• Current enrollment in a Bachelor of Science (BS), Master of Science (MS), or PhD program in Electrical Engineering or Computer Engineering from an accredited university.
• Understanding of fundamental digital design concepts, such as combinational and sequential logic, finite state machines, timing, and synchronous digital systems.
• Digital design or hardware-description experience gained through coursework, research, personal projects, competition teams, internships, or other technical activities.
• Demonstrated ability to approach technical problems methodically, learn new concepts, and debug complex systems.
• Excellent written and verbal communication skills.

PREFERRED EXPERIENCE

• FPGA development or verification experience through coursework, research, internships, personal projects, or extracurricular activities.
• Experience with SystemVerilog, Verilog, VHDL, or UVM.
• Experience with FPGA or HDL development tools such as AMD/Xilinx Vivado, Questa/ModelSim, or similar tools.
• Experience in digital signal processing.
• Experience with embedded systems or board-level digital hardware.
• Coursework or experience in communication systems.

All CesiumAstro internships are compensated competitively and located onsite at one of our facilities.

CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard torace, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.