A leading tech company located in Milpitas, California, is seeking an experienced Staff Engineer to lead projects in the Memory Design team. This role involves RTL design and verification in NAND flash memory technologies. Candidates should possess an MSEE and at least 5 years of relevant experience, particularly in the logic design flow. The position offers a collaborative and innovative environment focused on advancing memory technology. Competitive salary and benefits are provided.
Qualifications
MSEE plus 5 years of relevant experience.
Experience with chip-level integration and full product life cycle.
Working knowledge of NAND flash memory cell device operations.
Responsibilities
RTL design and verification in Verilog.
Balance design trade-offs with power, area, and performance.
Technical guidance and mentoring of junior engineers.
Skills
RTL design and verification
Excellent communication
Logic design flow knowledge
NAND flash memory knowledge
Education
MSEE
Tools
Synopsys Design Compiler
Cadence Genus
Cadence RTL Compiler
Synopsys Primetime
Cadence Tempus
Synopsys ICC
Cadence Encounter
Innovus
Job description
A leading tech company located in Milpitas, California, is seeking an experienced Staff Engineer to lead projects in the Memory Design team. This role involves RTL design and verification in NAND flash memory technologies. Candidates should possess an MSEE and at least 5 years of relevant experience, particularly in the logic design flow. The position offers a collaborative and innovative environment focused on advancing memory technology. Competitive salary and benefits are provided.