Staff Systems Test Engineer - Defense Systems, Secret Clearance

0090 CORP-Corporate Office

United States

On-site

USD 139,000 - 209,000

Full time

9 days ago
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Benefits offered by this job

Medical, Dental & Vision coverage
401k
Educational Assistance
Life Insurance
PTO

Job summary

Northrop Grumman Defense Systems is seeking a Staff Systems Test Engineer for the AVE-IATC (TP&E) team. This position will be located in Roy, Utah and will support the Sentinel (GBSD) program.

The role involves designing and executing robust test plans that meet schedule and cost constraints, and coordinating with SMEs, test teams, and design partners. You will lead hardware-in-the-loop testing, document ConOps, and contribute to test readiness reviews.

Qualifications

  • US Citizenship with active DoD Secret Clearance (within last 6 years).
  • Ability to obtain SAP approval within company requirements.
  • 8+ years experience in system integration (HW & SW).
  • 8+ years experience in test plans and TRRs.
  • 8+ years experience data collection/instrumentation and test readiness.
  • 8+ years experience generating ConOps flows and test data analyses.

Responsibilities

  • Develop test plans and procedures aligned with schedule and cost.
  • Coordinate with SMEs, Element Test teams, and System Test teams.
  • Lead hardware-in-the-loop test activities and instrumentation development.
  • Review and approve test readiness, deviations, and test amendments.
  • Communicate effectively with all organizational levels.

Skills

Test engineering
System integration
Instrumentation
Communication
Team collaboration

Education

Bachelor's degree in STEM
Master's degree in STEM
PhD in STEM
4 years extra in lieu of degree

Tools

IBM DOORS database

Job description

Northrop Grumman Defense Systems is seeking a Staff Systems Test Engineer for the AVE-IATC (TP&E) team. This position will be located in Roy, Utah and will support the Sentinel (GBSD) program.

The role involves designing and executing robust test plans that meet schedule and cost constraints, and coordinating with SMEs, test teams, and design partners. You will lead hardware-in-the-loop testing, document ConOps, and contribute to test readiness reviews.

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