Staff SI/PI Engineer

Rivian Automotive

Palo Alto (CA)

On-site

USD 186,000 - 296,000

Full time

11 days ago
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Job summary

Rivian Automotive seeks a senior SI/PI engineer in Palo Alto, CA to collaborate with package design, PCB design, SOC, physical and system teams to optimize die, package and system level SI/PI performance.

The role involves hands-on lab validation of SI/PI with simulations, current industry tools (HFSS, SIWave, Q2D, Keysight ADS, Cadence Sigrity) and scripting (Python/Matlab). AI-enhanced methodologies are encouraged.

Qualifications

  • MS in EE or related field with relevant experience.
  • Strong EE fundamentals and problem-solving skills.
  • Strong background in EM theory and transmission line.
  • Familiarity with SI/PI analysis for high-speed interconnects using EM and circuit tools.
  • Experience with AI-enhanced methodologies in engineering workflows.
  • Hands-on measurement with VNA, scope, TDR, spectrum analyzer.

Responsibilities

  • Collaborate with package, PCB, SOC, physical, and system design teams to optimize SI/PI performance.
  • Conduct SI/PI analyses for high-speed interconnects.
  • Validate SI/PI performance in lab and correlate with simulations.
  • Stay current with trends in SI/PI design methodologies.

Skills

SI/PI analysis
EM theory
Problem solving
AI in workflow

Education

M.S. in EE
Ph.D. in EE (preferred)

Tools

HFSS/SIWave/Q2D
Keysight ADS
Spice/Spectre
Cadence Sigrity
Matlab
Python
Perl

Job description

About Rivian

Rivianis on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract.

As a company, we constantly challenge what’s possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it for future generations.

Responsibilities
  • Working with package design and pcb design engineers on layout optimization based on SI and PI analysis using industry-standard tools.
  • Cross-functional collaborate with SOC architect, physical design, and system design to achieve optimum die, package and system level SI/PI performance
  • Hands-on to validate SI/PI performance in lab and correlate with simulations
  • Stay current with industry trends, emerging technologies, and best practices in SI and PI design methodologies.
Qualifications
  • M.S. Degree in EE or related field with relevant industry-level work experience.
  • Strong EE fundamentals and problem-solving skills.
  • Strong academic background in EM theory and transmission line.
  • Familiarity with all aspects of signal Integrity basic knowledge for high-speed SerDes, parallel interfaces, as well as power Integrity.
  • Hands-on experience in SI/PI analysis for high-speed interconnects using EM and circuit simulation tools such as Ansys HFSS/SIWave/Q2D, Keysight ADS, Spice/Spectre, Cadence Sigrity, and scripting languages (Matlab, Python or Perl).
  • Proven track record of incorporating AI into the methodology/workflow with demonstrable increase in productivity and rigor.
  • Measurement expertise with frequency and time domain tools (VNA, spectrum analyzer, TDR, oscilloscope).
Preferred Qualifications
  • Ph.D. in EE or related field with a minimum of 1~2 years of work experience.
  • Experience in high speed analog circuit design, including I/O equalization, clocking, fundamental circuits such as BandGap, Level Shifters, Comparators, DLL, etc.
  • Knowledge in 2.5D/3D package design, including interposer, silicon bridge, and 3D die stacking technologies.
  • Knowledge of memory and chiplet standards, including timing budget, design & sign-off methodologies.
  • Understanding of on-chip DVD/EMIR, system voltage budgets, and voltage regulator modeling and design.
  • Excellent communication and presentation skills.
Pay Disclosure

The salary range for this role is $186,000-$296,000 for Palo Alto, CA-based applicants. This is the lowest to highest salary we in good faith believe we would pay for this role at the time of this posting. An employee’s position within the salary

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