Staff PCB Layout Engineer - High-Speed Multi-Layer Design

Celestica

San Jose (CA)

On-site

USD 140,000 - 180,000

Full time

14 days+

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Job summary

Celestica is seeking a Staff Engineer, PCB Layout in San Jose, CA to lead the design, development, and implementation of complex PCB solutions. You will collaborate with cross-functional teams, customers, and manufacturing to drive robust, high-quality product development from concept through production.

You will provide technical leadership on high-density boards (up to 28 layers), DDR5, PCIe Gen5, and advanced serial interfaces, while ensuring adherence to IPC, EMI/EMC, and reliability

Qualifications

  • 7–10 years of relevant experience.
  • Bachelor's degree or equivalent combination of education and experience.
  • Expert in PCB design and development for complex, multi-domain projects.

Responsibilities

  • Lead design, development, and implementation of technical solutions for complex projects.
  • Provide technical leadership to a team of engineers and analyze complex systems.
  • Review customer requirements, manage vendor relationships, and coordinate with stakeholders.
  • Research new system ideas, create design plans, and modify existing systems to meet needs.
  • Create, modify, and improve PCB designs using CAD tools.
  • Participate in project planning, scheduling, and design reviews; support manufacturing.

Skills

Cadence Allegro
High-density PCB design
Signal Integrity
EMI/EMC considerations
DDR5/PCIe Gen5/56G SerDes

Education

Bachelor's degree

Tools

Cadence Allegro
Valor Trilogy 5000/NPI

Job description

Celestica is seeking a Staff Engineer, PCB Layout in San Jose, CA to lead the design, development, and implementation of complex PCB solutions. You will collaborate with cross-functional teams, customers, and manufacturing to drive robust, high-quality product development from concept through production.

You will provide technical leadership on high-density boards (up to 28 layers), DDR5, PCIe Gen5, and advanced serial interfaces, while ensuring adherence to IPC, EMI/EMC, and reliability

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