Staff Memory CAD Verification & Flow Engineer

Micron Technology, Inc.; Boise (ID); On-site; USD 130,000 - 277,000; Full time

Job summary

Micron Technology, Inc. is seeking a Memory CAD Engineer to join our global design verification teams.

You will support the design verification flow development, optimization, and implementation while collaborating with cross‑functional teams to improve cost, quality, reliability, time‑to‑market, and customer satisfaction. In this role, you will evaluate, develop, enhance and debug in‑house and commercial EDA tools for CMOS layout and design, partnering with design and layout teams to boost

Qualifications

• Bachelor’s or Master’s degree in a related field with 5+ years industry experience.
• Strong programming fundamentals with Unix and shell scripting.
• Good knowledge of CMOS circuits, deep‑submicron physical design, CMOS manufacturing, and layout design rules.

Responsibilities

• Develop tools, flows, and methodologies to increase the productivity and reliability of our Memory designs.
• Integrate commercial EDA (Electronic Design Automation) tools into design flows.
• Provide training, documentation, and support to end users on new tools and method.
• Undertake independent research and development of next-generation CAD Software to meet product development needs
• Identify deficiencies of current tools and flows
• Understand EDA industry product offerings and trends, and opportunities for gaining performance and efficiency
• Evaluate tools with internal customers. Define possible flows for improvement of efficiency and cost
• Develop, maintain and support the engineering infrastructure

Skills

Unix shell scripting

CMOS design knowledge

RTL-to-GDS flow

Education

Bachelor’s or Master’s degree in Electrical Engineering/Computer Engineering/Computer Science or related field

Tools

Calibre DRC/LVS

Cadence Virtuoso DFII

SKILL programming

Python

HSPICE

Job description

Micron Technology, Inc. is seeking a Memory CAD Engineer to join our global design verification teams.

You will support the design verification flow development, optimization, and implementation while collaborating with cross‑functional teams to improve cost, quality, reliability, time‑to‑market, and customer satisfaction. In this role, you will evaluate, develop, enhance and debug in‑house and commercial EDA tools for CMOS layout and design, partnering with design and layout teams to boost