Staff Physical Design CAD Engineer: Verification & Flows

Micron Technology; Richardson (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Micron Technology in Richardson, TX seeks a Memory Design Group CAD Engineer to develop and debug CMOS layout CAD tools and flows. You will work with design, layout, and verification teams to increase productivity and efficiency of memory designs.

The role involves evaluating EDA tools, integrating flows, and providing training and support while exploring next‑gen CAD software aligned with product development needs.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• 5+ years industry experience in CAD/EDA or semiconductor design.
• Strong Unix and shell scripting fundamentals.

Responsibilities

• Develop tools, flows, and methodologies to increase productivity of memory designs.
• Integrate commercial EDA tools into design flows.
• Provide training, documentation, and support to end users.
• Research and develop next‑gen CAD software for product needs.
• Identify deficiencies in current tools and flows.
• Understand EDA industry tools and trends for performance gains.
• Evaluate tools with internal customers and define improvement flows.
• Develop, maintain and support engineering infrastructure.

Skills

Unix shell scripting

CMOS design knowledge

Python

Verilog

Verilog-A

ncverilog

VCS

Calibre DRC/LVS

SKILL programming

Cadence Virtuoso

RTL-to-GDS flows

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field

Tools

Calibre DRC/LVS

Cadence Virtuoso

Verilog

Verilog-A

ncverilog

VCS

Spice/FastSpice

FineSim/PrimeSim

HSPICE

RTL-to-GDS flows

Python Qt

Job description

Micron Technology in Richardson, TX seeks a Memory Design Group CAD Engineer to develop and debug CMOS layout CAD tools and flows. You will work with design, layout, and verification teams to increase productivity and efficiency of memory designs.

The role involves evaluating EDA tools, integrating flows, and providing training and support while exploring next‑gen CAD software aligned with product development needs.