Staff FPGA Logic Design Engineer - High-Speed Protocols

Dormont Manufacturing Co; Milpitas (CA); On-site; USD 141,900 - 189,200; Full time

Job summary

Teledyne Technologies in Milpitas, CA is seeking a Staff Logic Design Engineer to architect and implement high-performance digital logic for protocol analysis. In this role, you'll collaborate with cross-functional teams and focus on FPGA-based systems for high-speed protocols.

Candidates should have 7+ years of experience in digital logic design and strong proficiency in Verilog/SystemVerilog. The position offers a collaborative work environment with minimal travel and a comprehensive salary range from $141,900 to $189,200.

Qualifications

• 7+ years of experience in digital logic design for FPGA or ASIC.
• Strong proficiency in Verilog/SystemVerilog RTL design.
• Experience with PCIe, CXL, NVMe, USB, and other protocols.

Responsibilities

• Develop synthesizable RTL for high-speed protocol.
• Target high-end FPGAs; perform synthesis and timing closure.
• Collaborate with teams to validate protocol analyzer platforms.

Skills

Verilog/SystemVerilog RTL design

Digital logic design

FPGA toolchains

PCIe protocol

Simulation/debug tools

Scripting (Python, Tcl)

Education

BS in Electrical Engineering, Computer Science or Computer Engineering

MS in Electrical Engineering

Tools

Vivado

Quartus

ModelSim

Job description

Teledyne Technologies in Milpitas, CA is seeking a Staff Logic Design Engineer to architect and implement high-performance digital logic for protocol analysis. In this role, you'll collaborate with cross-functional teams and focus on FPGA-based systems for high-speed protocols.

Candidates should have 7+ years of experience in digital logic design and strong proficiency in Verilog/SystemVerilog. The position offers a collaborative work environment with minimal travel and a comprehensive salary range from $141,900 to $189,200.