Senior/Principal FPGA Engineer

Lumicity; New Jersey; On-site; USD 110,000 - 170,000; Full time

Job summary

Lumicity is seeking an FPGA Engineer to design, implement, and optimize FPGA solutions for high-performance, real-time digital systems in New Jersey. You will drive RTL development, timing closure, and verification across complex hardware platforms, collaborating with hardware, firmware, and software teams to deliver scalable solutions from concept through production.

Applicants should have a strong background in Verilog/SystemVerilog, FPGA/ASIC design, and hands-on experience with Vivado and

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related discipline.
• 6+ years FPGA/ASIC digital design experience.
• Proficiency in Verilog/SystemVerilog.
• Experience with FPGA tools (Vivado).
• Strong understanding of synchronous design, timing closure, CDC.
• Experience with RTL design, verification tools.

Responsibilities

• Design, implement, and verify FPGA-based digital logic using Verilog/SystemVerilog.
• Develop low-latency control, data acquisition, and signal processing architectures.
• Perform RTL design, simulation, timing analysis, debugging, and hardware validation.
• Optimize FPGA designs for timing closure, resource utilization, and performance.
• Support hardware bring-up, integration, and hardware-in-the-loop testing.
• Develop and maintain interfaces across multiple clock domains and high-speed protocols.
• Collaborate with hardware, firmware, and software engineers throughout the lifecycle.

Skills

Verilog/SystemVerilog

FPGA/ASIC design

Timing closure

CDC (clock domain crossing)

Debugging

RTL design

Problem solving

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

AMD/Xilinx Vivado

ModelSim/QuestaSim

Job description

We are seeking an FPGA Engineer to develop high-performance, real-time digital systems for advanced hardware platforms. In this role, you will design, implement, and optimize FPGA solutions for low-latency signal processing, waveform generation, and system control. You'll collaborate with multidisciplinary engineering teams to develop scalable hardware solutions from concept through production.

Key Responsibilities

• Design, implement, and verify FPGA-based digital logic using Verilog/SystemVerilog.
• Develop low-latency control, data acquisition, and signal processing architectures.
• Perform RTL design, simulation, timing analysis, debugging, and hardware validation.
• Optimize FPGA designs for timing closure, resource utilization, and performance.
• Support hardware bring-up, integration, and hardware-in-the-loop testing.
• Develop and maintain interfaces across multiple clock domains and high-speed communication protocols.
• Collaborate with hardware, firmware, and software engineers throughout the development lifecycle.

Required Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline.
• 6+ years of FPGA or ASIC digital design experience.
• Strong proficiency in Verilog and/or SystemVerilog.
• Experience with FPGA development tools such as AMD/Xilinx Vivado.
• Solid understanding of synchronous digital design, timing closure, and clock domain crossing (CDC).
• Experience with FPGA simulation and verification tools (ModelSim, QuestaSim, or equivalent).
• Strong analytical, debugging, and problem-solving skills.

Preferred Qualifications

• Experience with AMD/Xilinx RFSoC, Zynq, or similar FPGA platforms.
• Familiarity with high-speed interfaces such as AXI, PCIe, Ethernet, JESD204B/C, SPI, or UART.
• Experience with embedded processors and firmware development.
• Python or C/C++ experience for automation and test development.
• Experience developing high-throughput, low-latency hardware systems.