Staff Engineer, SRAM Circuit Design

Samsung Semiconductor

San Jose (CA)

On-site

USD 163,000 - 253,000

Full time

14 days+

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Benefits offered by this job

Medical benefits
401(k)
Generous paid time off
Family-focused benefits

Job summary

Samsung Semiconductor in San Jose is seeking a seasoned SRAM Designer to lead design processes for advanced memory technologies. The ideal candidate will have a strong background in SRAM architecture, semiconductor physics, and circuit simulation, contributing to innovative designs that power the future of technology.

The position requires a minimum of 10 years of industry experience and offers a competitive salary range of $163,000 to $253,000. Join our team and be part of a company dedicated to innovation and excellence.

Qualifications

  • 10+ years experience in SRAM design or 8+ with a master's degree.
  • Proven track record in advanced process nodes.
  • Strong understanding of semiconductor device physics.

Responsibilities

  • Design SRAM memory arrays including bit cells and control circuits.
  • Optimize designs for performance, power, area (PPA).
  • Perform circuit simulations to validate functionality.

Skills

SRAM design
Circuit simulation
Cross-functional collaboration
Process technology
Scripting languages

Education

Bachelor's in Electrical Engineering
Master's in relevant field

Tools

HSPICE
Cadence Virtuoso
Spectre

Job description

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.

Advancing the World’s Technology Together

Our technology solutions power the tools you use every day—smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. Here you’ll have the opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.

What You’ll Do
  • Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders, and control circuits for advanced process nodes (e.g., 2nm, 3nm, 5nm).
  • Optimize SRAM designs for performance, power, area (PPA), and yield.
  • Develop custom layouts and perform physical design verifications (e.g., DRC, LVS).
  • Evaluate trade‑offs between speed, power, and area to meet design targets.
  • Develop and improve SRAM design methodologies, including automation scripts for design, simulation, and verification.
  • Work with product and test engineers to develop test plans and support silicon bring‑up.
  • Mentor junior engineers, providing guidance on SRAM design techniques and best practices.
  • Perform extensive circuit simulations using tools like HSPICE, Finesim or Cadence Spectre to validate SRAM functionality and performance.
  • Contribute to patents, technical papers, or industry conferences to advance SRAM technology.
What You Bring
  • Bachelor's degree in electrical engineering with 10+ years of industry experience or master's degree with 8+ years of experience (strongly preferred).
  • Prior experience in SRAM or memory circuit design, with a proven track record of delivering SRAM designs in advanced process nodes.
  • Strong understanding of semiconductor device physics and process technology (FinFET, GAA, SOI, etc.).
  • Expertise in SRAM architecture, including bitcells, sense amplifiers, write drivers, and read/write control paths.
  • Familiarity with timing analysis, power analysis, and design for manufacturability (DFM).
  • Proficiency in circuit simulation, variation analysis, and design tools such as Spectre, HSPICE, Cadence Virtuoso, etc.
  • Knowledge of scripting languages (e.g., Python, Perl, TCL) for automation of design tasks.
  • Strong cross‑functional collaboration and communication skills for working with design, layout, verification, and technology development teams.
  • Experience with advanced technology nodes (e.g., 5nm, 3nm, or beyond).
  • Knowledge of SRAM compiler development and experience with low‑power SRAM design techniques (e.g., power gating, voltage scaling).
  • Background in silicon debug and root‑cause analysis.
  • Inclusive, collaborative, and innovative mindset—adapting to diverse global norms, approaching challenges with curiosity, and proactively exploring new ideas.
What We Offer

Pay range: $163,000—$253,000 USD (may vary by location and experience). Includes incentive opportunities that reward individual and company performance.

Benefits include Medical, Dental, Vision, 401(k), and a generous paid time off package (4+ weeks, holidays, sick leave). Additional family‑focused benefits such as fertility care stipend, medical travel support, and virtual vet care are available. Emotional wellness resources and on‑demand therapy sessions support overall wellbeing.

Base Pay Range

$163,000—$253,000 USD

Equal Opportunity Employment Policy

Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. We provide comprehensive accommodations throughout our recruiting processes and support candidates with disabilities, long‑term conditions, neurodivergent individuals, or those requiring pregnancy‑related support.

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