Staff ASIC Layout Engineer

Anysilicon; Northern (KY); Hybrid; USD 140,000 - 210,000; Full time

Job summary

Nokia is seeking a Senior/Staff High-Speed Analog IC Design R&D Engineer to join a dynamic team focused on creating innovative products in a fast-paced environment. You will participate hands-on in all phases of R&D, from product definition to production ramp-up, and collaborate closely with circuit designers and cross-functional teams to support system-level customers.

Qualifications include a BS or Associate degree and 10+ years of analog/mixed-signal layout experience.

Qualifications

• BS degree or Associate degree in a relevant field.
• Over 10 years of analog/mixed-signal layout design experience.

Responsibilities

• Create innovative products in a collaborative team environment.
• Engage in all phases of R&D including product definition, circuit design, layout, verification, bring-up, DVT, qualification, test, and production ramp-up.
• Work closely with circuit designers to optimize floor plans.
• Perform daily layout editing and DRC/LVS tasks to ensure layout quality.
• Employ efficient design methodologies to minimize iterations and expedite product delivery.

Skills

Analog/mixed-signal layout

Layout optimization

DRC/LVS/ERC tools

Floor planning / P&R

Low-power, high-resolution layout

Cross-talk/EM/IR drop

Education

Bachelor's or Associate degree in Electrical Engineering

Tools

Virtuoso

Laker

Calibre

PVS

IC Validator

Job description

Nokia is at the forefront of revolutionizing connectivity through its Optical Networks division, especially following the acquisition of Infinera. The company is seeking a Senior/Staff High-Speed Analog IC Design R&D Engineer to join a dynamic team focused on creating innovative products in a fast-paced environment. This role involves hands-on participation in all phases of R&D, from product definition to production ramp-up, while collaborating closely with various teams to support system-level customers.

Responsibilities:

• Create innovative products in a collaborative team environment.
• Engage in all phases of R&D including product definition, circuit design, layout, verification, bring-up, DVT, qualification, test, and production ramp-up.
• Work closely with circuit designers to optimize floor plans.
• Perform daily layout editing and DRC/LVS tasks to ensure layout quality.
• Employ efficient design methodologies to minimize iterations and expedite product delivery.

Qualifications:

• BS degree or Associate degree in a relevant field.
• Over 10 years of experience in analog/mixed signal layout design.

Skills:

• Extensive familiarity with layout editing tools such as Virtuoso and Laker.
• Proficiency with DRC/LVS/ERC tools and flows like Calibre and PVS (or IC Validator).
• Understanding of electro-migration, IR drop, RC delay, self-heating, and capacitive cross-talk issues.
• Knowledge of analog layout requirements including matching and shielding.
• Experience in low-power, high-resolution circuit layout design, such as SD-ADC, SAR-ADC, bandgap, and regulators.
• Familiarity with automatic P&R or chip-level floor planning/integration.

• ASIC Design Services
• Verification
• Packaging & Wafer
• Semiconductor IP

Find the Right Semiconductor Partner

• ASIC Design Services
• Verification
• Packaging & Wafer
• Semiconductor IP

Work Email

Free No obligation Response within 24 hours