SRAM Design Engineer, Custom Silicon Excellence

Apple Inc.

Santa Clara (CA)

Hybrid

USD 150,000 - 278,000

Full time

13 hours ago
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Job summary

Apple Inc. in Santa Clara, California, is seeking an SRAM Circuit Designer to join the Digital Custom Group.

You will design and implement custom SRAM circuits, collaborate with a top-tier IPC/logic team, and drive architecture optimization for power and performance across Apple’s SoC efforts. The role requires a BS degree with at least 3 years of industry experience, strong RTL and design-tool proficiency, and a passion for silicon-level debugging.

Qualifications

  • BS degree with at least 3 years of relevant industry experience.
  • Experience in SoC design cycles and SRAM design for low power/high performance.
  • Knowledge of cache design and memory hierarchy.
  • Proficiency with RTL modeling.
  • Strong knowledge of design tools and nanometer device physics.
  • Ability to devise experiments and analyze data for silicon debug.

Responsibilities

  • Design and implement custom digital circuits for SRAM design.
  • Collaborate with logic/architecture team to formulate design specifications.
  • Define architecture/topologies optimizing for power, timing, area and yield.
  • Schematic capture, simulations/analysis, margin verifications.
  • Functional equivalency and DFT modeling.
  • Work with layout team to create optimal GDS and verify extracted GDS.

Skills

SoC design
SRAM design
RTL modeling
Memory hierarchy
Low power design
Machine Learning
Scripting
Design tools
Device physics

Education

BS degree

Tools

Schematic capture tools
Simulation tools
DFT modeling

Job description

Apple Inc. in Santa Clara, California, is seeking an SRAM Circuit Designer to join the Digital Custom Group.

You will design and implement custom SRAM circuits, collaborate with a top-tier IPC/logic team, and drive architecture optimization for power and performance across Apple’s SoC efforts. The role requires a BS degree with at least 3 years of industry experience, strong RTL and design-tool proficiency, and a passion for silicon-level debugging.

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