Sr. Principal Technical Quality Engineer

Cadence; San Jose (CA); On-site; USD 154,000 - 286,000; Full time

Benefits offered by this job

Paid vacation

Paid holidays

401(k) plan with employer match

Employee stock purchase plan

Medical, dental and vision plans

Job summary

Cadence seeks a Technical Quality Engineer to join the Silicon Solutions Group and act as a quality champion for multiple design teams. You will analyze defects, define QA and QC processes, and drive efficiency with agentic AI systems while reporting quality metrics to senior management.

You will help sustain ISO 9001 and ISO 26262 certifications and support external foundry quality programs, collaborating across global teams to improve flows and ensure high-quality semiconductor IP delivery.

Qualifications

• MSEE degree required.
• 7+ years of experience in analog or digital IC design or verification, or silicon fabrication QA.
• Analog IC design experience is a plus.
• Defect management/analysis methods such as RCA, 5Why, 8D are a plus.
• Strong communication, quality focus, proactivity and responsibility.
• Strong problem solving and teamwork skills.

Responsibilities

• Actively participate on the global SSG Quality Team.
• Represent the SSG Quality Team to customers and partners.
• Implement improvements to flows and procedures across the org.
• Define and maintain quality procedures for multiple design teams.
• Improve quality procedures with agentic AI systems.
• Generate, interpret, and communicate quality metrics.
• Perform Root-Cause-Analysis and identify Corrective Actions.
• Hold Post-Mortem reviews and summarize results.
• Assist design teams in Failure Analysis reports.
• Maintain ISO 9001 and ISO 26262 certifications.
• Support participation in external foundry quality programs.

Skills

IC design

IC verification

Defect management

RCA

5Why/8D

Communication

Teamwork

Agentic AI

Education

MSEE

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Work with the Cadence global silicon solutions teams who are designing semiconductor IP for the top electronic product companies in the world, in leading edge semiconductor processes, using the latest industry tools and methodologies. As a Technical Quality Engineer and member of the Silicon Solutions Group global quality team, you will collaborate with IP design teams, methodology teams, CAD teams, and engineering management, to ensure that we are constantly improving our processes and consistently delivering the highest quality product to our customers. You will be the quality champion for one or more design organizations within SSG and be responsible for analyzing design defects to determine root causes, defining design QA and release QC processes, and maximizing the efficiency of these processes through implementation of agentic AI systems. You will communicate key information to senior engineering management by summarizing and interpreting the quality metrics that measure the effectiveness of our quality systems. Finally, you will participate in quality certification activities for standards such as ISO 9001, and support foundry IP quality programs for leading foundries.

Location

• On-site in one of the North American design centers (Austin, Cary).

Requirements

• Education: MSEE
• Experience: 7+ years
• Hands-on experience in one or more areas of analog or digital IC design or verification, or experience in silicon fabrication quality assurance/control with a working knowledge of analog or digital silicon design flows.
• Experience in analog IC design is a plus.
• Experience in defect management and defect analysis processes such as RCA, 5Why, 8D is a plus.
• Strong communication skills, quality consciousness, proactivity, and sense of responsibility.
• Strong problem analysis and teamwork skills.

Responsibilities

• Actively participate on the global SSG Quality Team.
• Represent the SSG Quality Team to customers and partners.
• Work across the global organization to implement improvements to flows and procedures.
• Define and maintain quality procedures for multiple design teams.
• Improve effectiveness and efficiency of quality procedures through implementation of agentic AI systems.
• Generate, interpret, and communicate quality metrics.
• Perform Root-Cause-Analysis and identify Corrective Actions.
• Hold Post-Mortem reviews and summarize and communicate results.
• Assist design teams in preparation of Failure Analysis reports.
• Maintain quality certifications such ISO 9001 and ISO 26262.
• Support participation in external semiconductor foundry quality programs.

Be proud and passionate about the work you do. Together, our One Cadence -- One Team culture drives our success.

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.

Our benefits programs include:

• paid vacation and paid holidays
• 401(k) plan with employer match
• employee stock purchase plan
• a variety of medical, dental and vision plan options
• and more

We’re doing work that matters. Help us solve what others can’t.