Sr Principal Application Engineer

Cadence Design Systems, Inc.; Austin (TX); In loco; USD 150.000 - 230.000; Tempo pieno

Descrizione del lavoro

Cadence Design Systems, Inc. is seeking a Sr Principal Application Engineer in Austin to lead strategic customer engagements and influence EDA and Agentic-AI solutions.

You will work with cross-functional teams on digital design at advanced nodes (3nm and below) and drive design closure using Cadence toolchains. The role requires 15+ years in IC design implementation and signoff, with strong leadership, scripting, and communication skills to guide customers at executive levels and to shape

Competenze

• 15+ years in IC design implementation and signoff.
• Experience driving large technical programs.
• Strong communication and leadership for executive stakeholders.

Mansioni

• Lead customer engagements to achieve best-in-class PPA targets.
• Collaborate with R&D to influence tool enhancements.
• Drive benchmarks, flow optimizations for Synthesis, P&R, STA, IR drop.
• Represent Cadence at industry forums and publish technical papers.
• Lead cross-functional teams to ensure customer success at executive levels.

Conoscenze

Digital design

3nm+ node

Scripting: Tcl

Scripting: Python

Scripting: Perl

Leadership

Formazione

BS or MS in Electrical/Computer Engineering

Strumenti

Genus

Innovus

Tempus

Voltus

Conformal

Cerebrus

Descrizione del lavoro

Sr Principal Application Engineer### Sr Principal Application EngineerApply: AUSTIN: Full time: Posted Today: R57020## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.****Job Description****Overview**The Architect will serve as a technical leader within Cadence’s North America Field Applications Team, driving strategic customer engagements and influencing next-generation EDA & Agentic-AI solutions. This role demands exceptional technical depth, hands-on experience of design convergence, and the ability to align cross-functional teams toward delivering advanced design solutions for leading semiconductor companies. **Key Responsibilities*** **Technical Expertise**: Lead technical engagements with customers and partners to achieve best-in-class PPA, working closely with design teams to meet customer success metrics, guiding adoption of Cadence’s digital implementation, signoff technologies and AgenticAI features across advanced nodes (3nm and below).* **Cross-Functional Collaboration**: Partner with R&D and Product Engineering to influence tool enhancements based on real-world customer requirements.* **Innovation & Enablement**: Drive complex benchmarks, flow optimizations, and deployment of cutting-edge methodologies for Synthesis, P&R, STA, IR Drop, and power/timing closure.* **Thought Leadership**: Represent Cadence at industry forums, author technical papers, and deliver keynote presentations to position Cadence as a market leader. **Qualifications*** 15+ years of experience in IC design implementation and signoff, with demonstrated success in managing large-scale technical programs.* BS/MS in Electrical Engineering, Computer Engineering, or related field.* Deep expertise in digital design fundamentals, advanced node implementation (3nm and below), and EDA tool ecosystems.* Proven track record of leading technical teams and driving customer success at executive levels.* Strong proficiency in scripting (Tcl, Python, Perl) and flow customization for design closure.* Excellent communication, negotiation, and leadership skills with the ability to influence internal and external stakeholders.* Prior experience with Cadence tools (Genus, Innovus, Tempus, Voltus, Conformal, Cerebrus) and competitive solutions highly desirable.