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Ayar Labs is seeking a hardware engineer to own silicon bringup and validation of optical chiplets. You will perform post-silicon bringup across SerDes, photonic, and mixed-signal blocks, building test infrastructure and automation to meet specifications before customer deployment.
You will work with firmware, analog/mixed-signal, digital, and systems teams across the product cycle, writing plans and reports and driving results in a fast-paced lab setting in San Jose.
Location: San Jose, CA
Job Id:740
# of Openings:0
Location: San Jose (on-site)
Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.
In this role, you will own the silicon bringup and validation of our optical chiplets. You will execute post-silicon bringup and characterization across SerDes, photonic, and mixed-signal blocks, building the test infrastructure and automation that ensures our products meet and exceed specification before customer deployment.
Ayar Labs is an Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.