Sr Digital Design Engineer

Micron Technology, Inc; Boise (ID); On-site; USD 110,000 - 170,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time-off

Paid holidays

Job summary

Micron Technology, Inc. in Boise, Idaho, seeks a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks.

You will own RTL design, implementation, synthesis, timing analysis, power optimization, and design quality from RTL to GDS. Collaborating with architecture, verification, and physical design teams, you will deliver high-performance, power-efficient designs that meet product specs and PPA goals for next-generation memory products,

Qualifications

• Master's or Bachelor's degree in Electrical Engineering with required years of experience.
• Proven RTL design experience from spec through implementation handoff.
• Experience with front-end design flows including RTL, verification, synthesis, and STA.
• Experience creating and maintaining design constraints (SDC) and multi-mode timing.

Responsibilities

• Design RTL for DRAM digital/mixed-signal blocks aligned with specs and performance targets.
• Perform linting, CDC/RDC analysis, logic synthesis, timing constraints development, and timing closure.
• Collaborate with architecture, verification, and physical design teams to optimize PPA and design quality.
• Develop and maintain synthesis/timing constraints (SDC) and analyze timing reports across scenarios.
• Improve methodologies and automation to speed RTL-to-GDS flow.

Skills

Verilog

SystemVerilog

STA

Synthesis

Timing analysis

Power-aware design

SDC constraints

UPF power intent

Education

Master's degree in Electrical Engineering

Bachelor's degree in Electrical Engineering

Tools

Verilog/SystemVerilog simulators

Job description

Req ID

JR107904 Sr Digital Design Engineer

Company Overview

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Job Summary

Micron is seeking a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks. This role is responsible for RTL design, implementation, synthesis, timing analysis, power optimization, and design quality throughout the RTL-to-GDS flow. The engineer will collaborate with architecture, verification, and physical design teams to deliver high-performance, power-efficient designs that meet product specifications and PPA (Power, Performance, Area) objectives for next-generation memory products.

Responsibilities

• Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks, ensuring alignment with product specifications and performance targets.
• Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities.
• Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality.
• Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios.
• Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market.

Minimum Qualifications

• Master’s degree in Electrical Engineering (or equivalent) with 4+ years of experience, or Bachelor’s degree with 5+ years of experience in digital ASIC/RTL design.
• Proven experience developing RTL for complex digital designs from specification through implementation handoff.
• Strong knowledge of ASIC front-end design flows including RTL design, functional verification, logic synthesis, CDC/RDC analysis, and static timing analysis (STA).
• Experience developing and maintaining design constraints (SDC), including clocks, timing exceptions, I/O constraints, and multi-mode multi-corner timing scenarios
• Proficiency with Verilog/SystemVerilog and industry-standard simulation tools.
• Experience with low-power design methodologies, UPF-based power intent, timing constraints, and PPA optimization.

Preferred Qualifications

• Experience developing RTL for memory products or other high-performance digital designs.
• Familiarity with CMOS digital and mixed‑signal circuit concepts.
• Experience collaborating across architecture, verification, and physical implementation teams to resolve integration and design challenges.
• Demonstrated ability to improve engineering productivity through process improvements, automation, and enhanced design methodologies.
• Strong communication, problem-solving, and teamwork skills, with the ability to demonstrate AI-assisted technologies and generative AI tools to improve engineering efficiency and collaboration.

Job Profile(s)

Semiconductor Design Engineer 3

Relocation Level: TBD

Benefits

• Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.
• We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time-off program and paid holidays.
• For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.