Space FPGA RTL Engineer - Associate (Summer 2027)

Astranis Space Technologies; San Francisco (CA); On-site; USD 78,000 - 97,000; Full time

Job summary

Astranis Space Technologies in San Francisco, CA invites applications for a FPGA Associate (Summer 2027). This 12-week salaried program offers new graduates hands-on experience on hardware/software that may fly on our first satellite. If you have not graduated, apply as an Intern.

Responsibilities include RTL development for FPGA, working with multiple FPGAs and toolchains, interfacing with peripherals, and collaborating with electrical and software engineers to test RTL in hardware.

Qualifications

• Hold a B.S. or M.S. in electrical engineering, computer science, computer engineering, or equivalent.
• A passion for hardware development, including working in a fast-paced environment and hands-on design and development.
• Experience in designing, implementing, and testing high throughput systems implemented on FPGAs.
• Proficiency with Verilog/SystemVerilog for synthesis.

Responsibilities

• RTL Development for FPGA targeted applications.
• Work with multiple FPGAs and toolchains.
• Interface FPGAs with a variety of peripherals including high speed data converters, memories, MCUs.
• Write software to interface and test RTL in hardware.
• Collaborate closely with electrical and software engineers.

Skills

Verilog/SystemVerilog

FPGA design

High throughput systems

Education

B.S. in electrical engineering

M.S. in electrical engineering

Tools

Vivado IDE

Xilinx FPGAs

TCL scripting

Job description

Astranis Space Technologies in San Francisco, CA invites applications for a FPGA Associate (Summer 2027). This 12-week salaried program offers new graduates hands-on experience on hardware/software that may fly on our first satellite. If you have not graduated, apply as an Intern.

Responsibilities include RTL development for FPGA, working with multiple FPGAs and toolchains, interfacing with peripherals, and collaborating with electrical and software engineers to test RTL in hardware.